• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 32 subscribers
  • Views 174 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TUSB4020BI-Q1: Sequence Inquiry

Evan Wang
Expert 5740 points
Part Number: TUSB4020BI-Q1

Hi Team,

Could you help to clarify the sequence definition of the td1 in the TUSB4020BI-Q1 datasheet?

We might facing a timing issue on the VDD33 and VDD so need to clarify the definition of td1 delay and the voltage threshold.

Please refer to the below figure.

Looking forward to your reply.

Thank you.

  • 0
    TI__Guru** 116485 points

    Evan:

       If GRSTz is only connected with external Cap, VDD should be power on earlier or same as VDD33.

       If  GRSTz is controlled by external signal, then there are no power on sequence as long as GRSTz goes high after VDD33 and VDD are stable.

       VDD and VDD33 reach 90% are stable, GRSTz is 2V to go high.

    Regards

    Brian