Dear Technical Support Team,
When PCI 64bit access (wired up to 32 bits as a circuit) is performed,
When an access that does not meet the alignment is made (Read only), cycle from XIO2001ZWS (PCI initiator side) is not the intended access.
I would like to confirm why this is the case.
Please reply when you are in charge of E2E, as we would like to send you the detail and overall block diagram ,PCI access waveform documents via TI FAE.
Best Regards,
ttd