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XIO2001: schematic check

GARETH OU
Mastermind 9355 points
Part Number: XIO2001

Hi

Could you help check the XIO2001 schematic and any need to adjust ,Thanks

SCHEMATIC XIO2001IZW.pdf

  • 0
    TI__Genius 12621 points

    Hi Gareth,

    Please allow me a day or so to review the schematic and provide feedback. Thank you for your patience.

    Best,
    David

  • 0 in reply to David Waier
    TI__Genius 12621 points

    Hi Gareth,

    Please find my comments on the schematic review. Please also note XIO2001 Implementation Guide and have the customer review this document as well.

    Power Supply

    PCIR: Ok, connected to PCI_VIO (5V) through 1K resistor.

    VDD_15: Ok, connected to pi filter.

    VDD_15_5 & 6: Ok, connected to pi filter.

    VDDA_15:  Ok, connected to pi filter.

    VDD_33: Ok, connected to bypass capacitors

    VDD_33_AUX:  Ok, connected to 3V3_DUAL supply and de-coupling cap marked to be placed close to J11.

    VDDA_33:  Ok, connected to Pi filter.

     

    GND

    VSS: Ok, digital Ground

    VSSA: Ok, analog GND

     

    Combined Power Output:

    VDD_15_COMB:  OK, connected to bypass capacitors

    VDD_33_COMBIO:  OK, connected to bypass capacitors.

    VDD_33_COMB:  OK, connected to bypass capacitors

     

    PCI EXPRESS

    CLKREQ#: Note: Since CLKREQ is an open-drain output buffer, a system side pullup resistor is required.

    PERST#: Ok, connected to PLTRST_PCIE#

    REFCLK125_SEL: Ok, 10K to GND, 100MHz differential common reference clock used. 

    REFCLK+: REFCLK connected to PCIE_XIO2001_CLK_P

    REFCLK-: REFCLK connected to PCIE_XIO2001_CLK_N

    REF0_PCIE: Ok, connected to REF1 with 14.532K resistance.

    REF1_PCIE: Ok, connected to REF0 with 14.532K resistance.

    RX: .0 Ohm resistors in series connected to connector.  Typically, it is recommended to remove 0 Ohm.

    TX: Ok, .1uF caps in series connected to connector

    WAKE#: Note: Since WAKE is an open-drain output buffer, a system side pullup resistor is required. Resistor value >1.65kOhm recommended. Please see the XIO2001 Implementation Guide Section 3.5 for further details.

     

    PCI SYSTEM

    AD[31:0]: Ok, goes to connector.

    C/B[3:0]#E: Ok, goes to connector

    CLK: Ok, CLK is connected to CLKOUT6.  CLKOUT outputs are used.

    CLKOUT0, 1: Ok, CLKOUT0 and CLKOUT1 are used as PCI clock, goes to connector.

    CLKOUT[4:2]: Other CLKOUT are no connect.

    CLKOUT6: Ok, connected to CLK through 49.9 Ohm series resistor.

    DEVSEL#: Ok, has 2.7k pullup resistor.  Goes to connector.

    FRAME#: Ok, has 2.7k pullup resistor.  Goes to connector.

    GNT[5:0]#: GNT0# and GNT1# go to connector, all others are no connect.

    INT[D:A]#: All INT# have 2.7K pullup.  All go to connector.

    IRDY#: Ok, has 2.7k pullup resistor.  Goes to connector.

    LOCK#: Ok, has 2.7K pullup resistor. Goes to connector.

    M66EN: Ok, has pulldown resistor to GND.  PCI clock operate at 25MHz or 33MHz.

    PAR: Ok, goes directly to connector.

    PERR#: Ok, has 2.7K pullup resistor.  Goes to connector.

    PME#: Ok, has 10K pullup resistor to 3V3_DUAL.  Goes to connector.

    REQ[5:0]#: REQ#0 and REQ#1 have 2.7K pullup resistor.  Per PCI spec, weak pullup resistor is required on all unused REQ# lines.

    PRST#: Ok, goes to connector.

    SERR#: Ok, has 2.7K pullup resistor. Goes to connector.

    STOP#: Ok, has 2.7K pullup resistor. Goes to connector.

    TRDY#: Ok, has 2.7K pullup resistor. Goes to connector.

     

    JTAG:

    JTAG_TCK: Ok, pulled low with 10K resistor. 

    JTAG_TDI: Ok, floating.

    JTAG_TDO: Ok, floating.

    JTAG_TMS: Ok, floating.

    JTAG_TRST#: Ok, pulled low with 10K resistor. 

     

    MISC:

    CLKRUN_EN: Ok, 10K pulldown to GND.  Clock run support disabled.

    EXT_ARB_EN: Ok, 10K pulldown to GND.  Internal arbiter enabled.

    GPIO0: Device is not in CLKRUN mode as indicated by CLKRUN_EN pulled down.

    GPIO1: PWR_OVRD does not need to be pulled-up.

    GPIO2: Does not need to be pulled-up.

    GPIO3: 10k pull-up placed, but SDA line unused and EEPROM not placed. Pull-down to disable EEPROM interface if desired.

    GPIO4: 10k pull-up placed, but SDA line unused and EEPROM not placed. Pull-down to disable EEPROM interface if desired.

    GRST#: Connected to PLTRST_PCIE#, which is also connected to PERST#. Please note data sheet section 6.12 on Power Up and Power Down Sequencing. If no custom reset is needed, GRST# can be left floating.

    PCLK66_SEL: Ok, 10K pullup to 3V3. 33MHz PCI clock. Note that If an external clock with a frequency higher than 33 MHz is used, the M66EN terminal must be pulled up for the XIO2001 to function correctly

    SERIRQ: Pulled low with 10K resistor.  Serial IRQ interface is disabled.

    VREG_PD33: Ok, pulled low with 10K resistor.

    Please have the customer review my comments.

    Best,
    David