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Dear Team,
In our system, TCA9548 is used in the following order:
Power-up reset pulls reset pin
Write command to select channel 1 – > 0x02
Operate the I2C device behind mux
Write command 0x00 to close all channels when the operation is complete.
Return to step 2.
During this continuous operation, we found that in step2, communication errors often occur on the mux I2C input port, sometimes the SCL is lost. Sometimes the data on SDA is incorrect. The reason is unknown.
if our processes are reasonable and if there is room for further optimization. Thank you!
Please show an oscilloscope trace of a failing write operation.
The TCA9548A is a slave device without clock stretching; the only thing it outputs is the ACK bit. I suspect that this is a problem with the controller.
Hello Please show the scope waveforms as clemens has stated and we will be happy to help!
Regards,
Kameron
Dear Hill,
FYI.
And Pls help to confirm if we need run 0x73(9548 i2c address) 0x00 after every read/write cycle , show is last picture?
abnormal waveform
Normal Waveform:
The first trace appears to show a read access to address 0x76, which is stopped by the master.
The second trace is unreadable.
Please change the oscilloscope's time scale to zoom in to the red boxes.
hello
Today is a TI Holiday. Thank you for your patience and we will respond next week Monday
Hello,
Any update on this issue.
As Clemens stated can you provide a better picture?