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DS90UB962-Q1: 962 FrameSync setting problem

Part Number: DS90UB962-Q1

Hi team,

The RVC lens uses a 962 deserializer, which requires a FrameSync signal for the lens to produce pictures;

The following is the FrameSync settings in the 962 datasheet. I measured the waveform according to this configuration and found that it was not a 60Hz synchronization signal, but 900Hz;

Question: There should be something wrong with the description in the datasheet. Could you please help confirm the correct setting method (the camera frame rate of the Chase project is 25fps)

  • Hi Alan,

    Could you please provide a register dump of the UB962 here so I can confirm the register configuration? Sounds like this is internal generated frame sync, and customer needs 25fps, I can take a look at customer configuration once provided. 

    Best,

    Thomas

  • Hi Thomas,

    1. There is no problem with the 50/50 duty cycle configuration of 60Hz, but there is a problem with the 10% duty cycle. Is there any risk?

    2. Based on the sample code, configure 0X58 as 0X58 (2.5Mbps) or configure it as 0X5E. The frequency does not change. My understanding is that BC ate is different and FS_CLK_PD should be different. This will cause the frequency of Fsync to change. So are there any additional configurations in the BC rate configuration?

    3. Feedback changes the High and Low of FS, which is inversely proportional to the size of T_FS. It is not directly proportional to the above state. For example, if FS_HIGH is increased, if 2776 is increased to 3000, it is found that T_FS (time width) decreases and the frequency increases, which is consistent with the theory. The calculation is the opposite.

    Can you help me try to configure the Internally Generated FrameSync function on the EVN board to see if there is a problem with this function or if the customer has missed the configuration?

  • Hi Thomas,

    In response to the question 1 provided by me above, I would like to add the customer’s solution:

    The following configuration methods are developed by customers themselves and are provided for reference:
    This will cause the following problems:
    1. This method is inconsistent with the description in the 962 datasheet. Whether it can be used needs to be confirmed by ti;
    2. Whether the 50% duty cycle can meet the camera requirements (lens framesync is generally 10% duty cycle) is not yet certain. We are also confirming with the lens manufacturer;

    962 FrameSync configuration method (25Hz):
    1s/25fps/600ns = 66667: According to this configuration, the test waveform is 375Hz, which is inconsistent with the expected frequency (15 times the expected frequency);

    375/25 = 15, 66667*15 = 1000005
    1000005/2 = 500002 (0x07a122, corresponding to 0x1a/0x1b/0x1c register, 50/50 mode). According to this configuration, the test waveform is 25Hz, consistent with the expected frequency;

    ////////////////////////////////
    0x4c,0x24
    0x18,0x62 //50/50 mode (50/50 mode is chosen because the Hi/Lo mode register bits are only 16 bits, and 1000005*90% = 900004 (0xdbba4) requires 24 bits)
    0x10,0x91 //Map framesync to GPIO0
    0x58,0x58 //2.5M (I also tried setting it to 0x5e (50M), it has no effect, and the test waveform is also 25Hz)
    0x1a,0x07
    0x1b,0xa1
    0x1c,0x22
    0x18,0x63

  • Hi Alan,

    Thanks for this info, will check on this today.

    Best,

    Thomas

  • Hi Alan,

    A few points to note here:

    • UB962 BC rate: could you confirm what the partner ser will be here & what the intended mode is? I saw that you mentioned setting BC rate to 2.5Mbps, this would be the correct rate for pairing with a DVP serializer such as the UB933 or UB913A, however this would not be the correct rate if the partner serializer is a UB935 or UB953 (either in sync mode (BC rate about 50M) or async mode (BC rate 10M)
    • Frame sync duty cycle: In this case we have options for both 50% duty cycle as well as configuring the "high time" and "low time" in registers 0x19 - 0x1C. If customer would like duty cycle to 10%, set high/low time in appropriate registers.

    Best,

    Thomas

  • Hi Alan,

    I tested the datasheet script here, and saw no issue with the 60fps frame sync (signal was 60Hz as expected).

    import time
    desAddr = 0x60
    serAlias = 0x18
    
    board.WriteI2C(desAddr,0x4C,0x01) #RX port select
    board.WriteI2C(desAddr,0x58,0x5E) #BC rate select (0x5E for sync mode)
    board.WriteI2C(serAlias,0x0E,0xFF) #enable SER GPIO output
    
    board.WriteI2C(desAddr,0x6E,0xAA) #BC GPIO select - Frame sync to GPIO0 and GPIO1
    board.WriteI2C(desAddr,0x10,0x91) #Set up GPIO0 on UB962
    
    board.WriteI2C(desAddr,0x19,0x0A) #select FS high / low times
    board.WriteI2C(desAddr,0x1A,0xD7)
    board.WriteI2C(desAddr,0x1B,0x61)
    board.WriteI2C(desAddr,0x1C,0xA0)
    
    board.WriteI2C(desAddr,0x18,0x01) #enable frame sync with FS high and FS low times

    Could you let me know if there's a mis-match between what I've done here and what customer has tested?

    Best,

    Thomas

  • Hi Alan,

    Sorry for the multiple follow ups here, please try the below code for 25 FPS frame sync at 10% duty cycle.

    import time
    desAddr = 0x60
    serAlias = 0x18
    
    board.WriteI2C(desAddr,0x4C,0x01) #RX port select
    board.WriteI2C(desAddr,0x58,0x5E) #BC rate select (0x5E for sync mode)
    
    board.WriteI2C(desAddr,0x6E,0xAA) #BC GPIO select - Frame sync to GPIO0 and GPIO1
    board.WriteI2C(desAddr,0x10,0x91) #Set up GPIO0 on UB962
    
    board.WriteI2C(desAddr,0x19,0x1A) #select FS high / low times
    board.WriteI2C(desAddr,0x1A,0x0A)
    board.WriteI2C(desAddr,0x1B,0xEA)
    board.WriteI2C(desAddr,0x1C,0x5F)
    
    board.WriteI2C(desAddr,0x5C,serAlias) #enable SER GPIO output
    board.WriteI2C(serAlias,0x0E,0xFF) #enable SER GPIO output
    
    board.WriteI2C(desAddr,0x18,0x01) #enable frame sync with FS high and FS low times

    I used the frame sync calculator in the FPD/ portal to calculate the register values needed here, please see sharepoint link here.

    Best,

    Thomas