TIC12400EVM-KIT: Interface with Mcu

Hi Amudha,

I can see that you are getting a response from the TIC12400 with the returned value of 0xC00000.  the first 8 bits returned are status bits and the device has set the POR and SPI_FAIL bits.  The POR bit is always set after a Power On Reset or initial power up event.  The SPI FAIL indicates and incorrect SPI transaction.

The SPI fail bit is probably getting set because you are incorrectly setting the register address.  Note that the Address LSP is bit 25, and not bit 24.  Therefore when you try to read register 0x01, you need to bit shift the address field by 1 to the Left so that the "1" is in the bit 25 location of the SPI transaction.  Your waveform shows that the "1" is in the bit 24 location which is part of the Data In field.

Here is a logic analyzer plot of reading the Device ID register 0x01.  You can see that the bit shift causes the first byte to be 0x02.

Outside of shifting the Address field, you will also need to verify you are using Odd Parity when setting the Parity Bit.  The device requires an Odd number of 1's for the transaction.  If the total number of 1's in the SPI transaction including the Parity Bit is an Even number, then the device will discard the transaction.  Therefore, if the total number of 1's without the Parity Bit is an Even number, then you will need to set the Parity Bit to 1 in order to create an overall Odd number of 1's in the Transaction.  Likewise if the total number of 1's without the Parity Bit is an Odd number, then you will need to set the Parity Bit to 0 in order to maintain the overall Odd number of 1's in the Transaction.

Please verify the Read/Write Op Code bit, Address field, Data field, and Parity Bits match the datasheet diagram and that the parity bit is set for Odd Parity.

Regards,

Jonathan