TCAN1145-Q1: Register value of MODE_SEL[2:0] in fail-safe mode (UVcc)

Part Number: TCAN1145-Q1

Tool/software:

1. Power on with VBAT = 13.5V.

2. Decrease the VBAT voltage to 4.2V.

3. Read the register value of MODE_SEL via SPI read command.

 Then, the result is MODE_SEL = 001b (Sleep), but INH is still High.

 (MODE_CTRL Register (Address=10h) = 01h, FSM_CONFIG Register (Address=17h) = 0x06, INT_1 Register(Address=51h) = 00h, INT_2 Register(Address=52h) = 44h, INT_3 Register(Address=53h) = 0x20)

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Question. Is this a possible result? Could you explain about this result based on device specifications?

  • Hi Heonjong,

    I have alerted our part expert of this question and they will be looking into your question a little bit deeper.

    As a quick heads up - we may be a bit slower in our response time this week, and it could be greater than the standard 24 hours that we try to hit, as our applications team is time constrained at the moment. I apologize for the inconvenience and we appreciate your patience while we look into this inquiry. 

    Best,

    Parker Dodson

  • Hi Parker,

    Thanks for your reply.

    I would like to explain the test steps in more details. Please refer to the steps more detailed.

    1. Power on with VBAT = 13.5V.

    2. Decrease the VBAT voltage to 4.2V. --> Wait for about 4 seconds. --> Increase the VBAT voltage to 5V.

    3. Read the register value of MODE_SEL via SPI read command.

    Best regards,

    Heonjong Park

  • Hi Heonjong,

    The FSM interrupt in the INT_3 register can be used to determine when the device has entered fail-safe mode. The mode control register will read back the last mode that the device was in before entering fail-safe mode. In this case I assume that the device was previously in sleep mode (thus the readout of the mode control register) before the undervoltage condition caused a transition to fail-safe mode where INH signal on. 

    Let me know if you have any more questions. 

    Regards, 
    Eric Schott

  • Hi Parker,

    1. As in the test steps described above, I never set to sleep mode. And the INH pin level was also kept High during the test.

    2. And, according to the Figure 10-23. UVcc State Diagram, the device shall not go to sleep mode in case of Fail-safe enabled.

    Therfore, I think that the register value of MODE_SEL[2:0] should be Standby(100b).

    Please give me your opinion.

    Best regards,

    Heonjong Park

  • Hi Heonjong,

    The SWE timer will automatically put the transceiver into sleep mode if the device is left idle for ~4 minutes. This can be done without any software intervention, so it is likely that the device has moved to sleep mode due to this. Does this time make sense with the test setup that was used in this case?

    Regards, 
    Eric Schott

  • Hi Eric,

    The whole test steps take less than 30 seconds.

    Best regards,

    Heonjong Park

  • Hi Eric,

    I tested with combinations of Fail-safe Enabled/Disabled conditions and various voltage conditions (Normal, Supply under voltage(Brownout), Supply off/on).

    I could not understand only the result in this case.

    Best regards,

    Heonjong Park

  • Hi Eric,

    For your reference, I would like to provide additional measurements.

    When VBAT=4.2V in Step 2, VSUP=4.09V(=INH) & VCC=3.7V & VIO=2.96V.

    Regards,

    Heonjong Park