DS90UB927Q-Q1: Interface forum

hui_zhu

Part Number: DS90UB927Q-Q1

Tool/software:

i am use 927 and 928 to send lvds single . i use video source pixclk is 26.2MHz . But in anlog launchPAD pixclk is 33-36MHz instability. 2 picture is use PG Timing Source = internal and interal w/ext.clock. use ext clock pixclk is not correct . I measure pixclk is 26.2Mhz by oscillograph. what can i do next ? please help me! thanks.

2 months ago

0 Casey McCrea 2 months ago

TI__Guru** 103215 points

Hui,

Can you please explain in more detail what you are trying to do here? Are you trying to use the internal pattern generation feature to display a test pattern? Or are you trying to pass video end to end from an external source connected to 927?

What HW are you using for this test? A custom designed board or TI EVMs? What kind of cable are you using? Do you have any pictures of the setup that can be shared?

Best Regards,

Casey

0 hui_zhu 2 months ago in reply to Casey McCrea

Prodigy 80 points

hi,casey

I am trying to pass video end to end from an external source connected to 927. The board is custom designed board. Cable is use STP connect 927 to 928. In this case , if external source is ok, is 927 pass video to 928 need any Initialization steps？such as set registor by iic?

thanks for reply！

0 Casey McCrea 2 months ago in reply to hui_zhu

TI__Guru** 103215 points

Hui,

There is no configuration needed to get video to pass end to end from 927 -> 928 as long as the HW follows good design practice for the high speed serial channel, and the MODE strapped configurations all match the desired HW configuration.

What kind of cable specifically is being used here? Is this a typical automotive STP cable like Dacar 535? Can you share the HW schematics for both sides for review? Also can you share any information about the video parameters?

Best Regards,

Casey

0 hui_zhu 2 months ago in reply to Casey McCrea

Prodigy 80 points

Hi,Casey

I am try use anlog launchPAD PG and set Timing Source to interal w/ext.clock, on my custom designed board ,927 can send all pg pattern picture to 928 and tft panel can display correctly. then I set Timing Source to external , tft panel display all white. annex below is HW schematics. Please help to review. The video parameters like picture description.

Best Regards.

ti927sch.pdf

0 Casey McCrea 2 months ago in reply to hui_zhu

TI__Guru** 103215 points

Hui,

Does your design include any termination for the LVDS inputs to the 927? Each differential LVDS signal requires external 100 ohm termination which I don't see in this schematic. Maybe it is included on a different page?

Best Regards,

Casey

0 hui_zhu 2 months ago in reply to Casey McCrea

Prodigy 80 points

Hi,Casey

I am placed 100 ohm termination on video source side with Each differential LVDS signal . Whether it must be placed close to 927? Is there have any other problem in my schematic such as Hardware configuration? Yesterday , I control gpio pass through 927 to 928 works good. On the surface, it seems that the video source connect to 927 has a problem. but i can not find a problem.

Best Regards.

0 Casey McCrea 2 months ago in reply to hui_zhu

TI__Guru** 103215 points

Hui,

Typically for best signal integrity it is recommended to place differential termination near the sink for LVDS which in this case would be the 927 device. From the schematic, I don't see any other obvious issue. How have you confirmed that the video source is sending valid timing to the 927 input side? It sounds like the PCLK rate at least is correct based on the fact that you are able to get video with external PCLK and internal timing PATGEN, but when switching the PATGEN to external video timing it fails. The most likely scenario then seems like the source is not sending valid video timing to the 927 input

Best Regards,

Casey