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DS90UB948-Q1: ds90ub948 generate pattern script

Part Number: DS90UB948-Q1

Tool/software:

Hi TI,

we need a scripts that ds90ub948 generate pattern.

Regards,

Zhen

  • Hey Zhen,

    What video timing do you need to generate?

    Regards,
    Fadi A.

  • 1 internal timing and internal pclk

    2 internal timing and external pclk

    3 external timing and external pclk

    Regards,

    Zhen

  • Hey Zhen,

    Can you send me the timing for your display. 

    THW =
    TVW =
    AHW =
    AVW =
    HBP =
    VBP =
    HSW =
    VSW =
    HFP =
    VFP =
    PCLK =
    Bits_per_pixel =

    Regards,
    Fadi A.

  • Parameters are as follows:

    Parameters are as follows(PCLK=91.5MHz):

    THW = 2028
    TVW = 752
    AHW = 1920
    AVW = 720
    HBP = 32
    VBP = 21
    HSW =24
    VSW = 3
    HFP = 52
    VFP = 8
    PCLK = 91.5
    Bits_per_pixel = 24

    Regards,

    Zhen.

  • Hi Zhen,

    I will generate and get back to you within 1-2 business days.

    Regards,
    Fadi A.

  • Hi Zhen,

    Can you try attached script?

    Ux948_Patgen_Internal_Timing.py
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    import time
    #Patgen with internal timing for this video timing
    # THW = 2028
    # TVW = 752
    # AHW = 1920
    # AVW = 720
    # HBP = 32
    # VBP = 21
    # HSW =24
    # VSW = 3
    # HFP = 52
    # VFP = 8
    # PCLK = 80 Mhz using AON CLk
    Des_addr = 0x58 #IDx Strap for 928 I2C Address
    time.sleep(0.5)
    board.WriteI2C(Des_addr,0x01,0x02) # Reset (Can comment out --- it's optional)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Regards,
    Fadi A.

  • This script doesn't work

    Regards,

    Zhen.

  • Hi Zhen,

    I see the issue. Your PCLK is too high for internal oscillator. 948 can go up to 70 Mhz max frequency for PCLK.

    Are you able to run external PCLK with internal timing? Or external timing with external PCLK? If so, I have both of these scripts attached for you. 

    Ux948_Patgen_External_Timing_CLK.txt
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    import time
    #Patgen with internal timing for this video timing
    # THW = 2028
    # TVW = 752
    # AHW = 1920
    # AVW = 720
    # HBP = 32
    # VBP = 21
    # HSW =24
    # VSW = 3
    # HFP = 52
    # VFP = 8
    # PCLK = 80 Mhz using AON CLk
    Des_addr = 0x58 #IDx Strap for 928 I2C Address
    time.sleep(0.5)
    board.WriteI2C(Des_addr,0x01,0x02) # Reset (Can comment out --- it's optional)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
    Ux948_Patgen_Internal Timing_External_CLK.txt
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    import time
    #Patgen with internal timing for this video timing
    # THW = 2028
    # TVW = 752
    # AHW = 1920
    # AVW = 720
    # HBP = 32
    # VBP = 21
    # HSW =24
    # VSW = 3
    # HFP = 52
    # VFP = 8
    # PCLK = 80 Mhz using AON CLk
    Des_addr = 0x58 #IDx Strap for 928 I2C Address
    time.sleep(0.5)
    board.WriteI2C(Des_addr,0x01,0x02) # Reset (Can comment out --- it's optional)
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Regards,
    Fadi A.