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Tool/software:
Dear TI Partner:
We use TI947+TI948+dual link 1080p screen, fast power on and off, there will be a probability of black screen problem, black screen, 948pattern can not be displayed normally, we must power off 948 and then initialize it can be displayed normally, such as 948 into some abnormal state, do you have any advice on this problem?
The configuration for 947 is as follows:
reg, data
0x03, 0xda
0x04, 0x90
0x0D, 0x03
0x5b, 0x23
0x4f, 0x80
The configuration for 948 is as follows:
reg, data
0x05, 0x9e
0x1D, 0x05
0x1E, 0x90
0x24, 0x00
0x43, 0x00
0x49, 0x60
The LVDS screen parameter information is as follows:
resolution: 1920x1080,clock: 69502Khz, HPW: 24, HBP: 32, HFP:76, VPW: 5, VBP: 24, VFP: 20, link mode: dual, and VESA(24.1) bit map.
Hi Loki,
I need more information about the issue:
- Can you please provide a detailed list of the actions you are doing in sequential order (when you power up the 947 and 948, when you run the initialization scripts for 947 and 948, and when and which device you PDB)? There may be a violation of the power sequence.
fast power on and off
- Just to confirm, you PDB the 948? What is the reproduction rate of this phenomenon?
Please note that the 947 must be sending valid video data before the 948 is powered up in our power sequence. Please refer to 9.1 on the 948 datasheet for the diagram and description.
- Lastly, can you please provide a description of what the software configurations for the 947 and 948 are doing?
BR,
Esther
Dear Esther:
947 and 948 are powered on almost at the same time, and then soc is initialized first. After soc has stable output, 947 is initialized. After initialization, 947 will wait for 947 to lock to 948 before initializing 948. Is there a way for 947 to determine when to start sending valid data?
After initializing 947, I tried to initialize 948 after delaying 48ms, but there was still a problem.
The configuration for 947 is as follows:
The first column represents the register, and the second column represents the value written into the register
0x03, 0xda //open i2c path through
0x04, 0x90 // set DE mode
0x0D, 0x03 // gpio0 is configured for pass-through pwm
0x5b, 0x23 // Set to dual link
0x4f, 0x80 // set SPWG mapping
The configuration for 948 is as follows:
reg, data
0x05, 0x9e //open i2c path through all
0x1D, 0x05 // gpio0 is configured for pass-through pwm
0x1E, 0x90 // pull up gpio2
0x24, 0x00 // unuse
0x43, 0x00 // unuse
0x49, 0x60 // Set to dual link ouput
Hello,
Monday 2/17 is a US public holiday, support will resume on Tuesday 2/18. Thanks for your patience.
Regards,
Logan
Hi Loki,
Can they change the power up of the system to powering on the 947 first and then the 948. You can take a look at this E2E for further explanation.
Best Regards,
Gil Abarca