Hi Jeff,
Thanks for reaching out. Our policy is to have the customer/field engineer review their design against our schematic checklist first: DP83867 Schematic Tool.xlsx
Use the Pin Wise Checklist tab at the bottom of this spreadsheet. If you have any questions that fall outside of this checklist, I'm happy to help.
Best,
Shane
Hi Jeff,
RGMII:
1. From the 83867 datasheet, PHY side center taps must be isolated, not tied together. I recommend following the datasheet rather than using magnetics with center taps tied together:
Please also ensure the magnetics fit our datasheet specs
SGMII:
1. I'm not sure what the comments in red here are supposed to mean, I also do not see the required pullup on MDIO in your schematic. Please ensure MDIO is pulled up somewhere in your design:
2. I recommend following the datasheet rather than using magnetics with center taps tied together.
3. The DP83867 datasheet requires a 0.1uF capacitor on the SGMII lines. Your design uses 0.22uF capacitors. I recommend changing these to 0.1uF to align with the datasheet requirement:
I see that much of your design is using the AM69 EVM as a reference. If the customer has validated this EVM works and wishes to replicate the design, that is ok, but I strongly recommend following the DP83867 datasheet specs.
Straps/Addresses:
To see what mode you're strapping, you can use the 'Strap tool' section of the schematic tool. It seems that you've configured this correctly. Based on the schematic, this is the current setting in your RGMII PHY:
For the SGMII design, you should change the pullup/pulldown on LED_0 to enable SGMII mode. This would use a 10K PU and 2.49K PD. Currently you have this Open/Open, which would be correct for RGMII:
Best,
Shane
Hi Jeff,
For item 1, I see in the schematic that there is a MDIO pullup elsewhere in the design. This is good to see and aligns with our datasheet requirement:
You can ignore my comment for item 1.
For item 3, I recommend following the 83867 datasheet and using 0.1uF capacitors.
Best,
Shane
