DP83869HM: AM2634 EnetPhy_findCommonNwayCaps: PHY 3: no common caps found

ych_chn

Part Number: DP83869HM
Other Parts Discussed in Thread: AM2634, DP83869

Tool/software:

I used AM2634 to connect DP83869 through RGMII and set it to RGMII to 1000BASE-X by starting resistor, LOG shows EnetPhy_findCommonNwayCaps: PHY 3: no common caps found. But RGMII to copper cable can work normally, log as below:

Image loading done, switching to application ...
==========================
CPSW LWIP TCP ECHO SERVER
==========================
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:0 From 4 To 2
Open MAC port 1
EnetPhy_bindDriver: PHY 3: OUI:080028 Model:0f Ver:01 <-> 'dp83869' : OK

PHY 3 is alive
Starting lwIP, local interface IP is dhcp-enabled
[LWIPIF_LWIP] NETIF INIT SUCCESS
Host MAC address-0 : 70:ff:76:1d:ec:f2 Host MAC address-0 : 70:ff:76:1d:ec:e3 [0]Enet IF UP Event. Local interface IP:0.0.0.0
[LWIPIF_LWIP] Enet has been started successfully
[0]Enet IF UP Event. Local interface IP:192.168.1.250
[0]Waiting for network UP ...
PHY 3: *1 = 0x614d
PHY 3: *1df = 0x41
PHY 3: *c00 = 0x140
PHY 3: *c01 = 0x614d
PHY 3: *c10 = 0x3148
PHY 3: *c19 = 0x10
PHY 3: *c1a = 0x0
PHY 3: *c2a = 0x812
PHY 3: *c30 = 0x3056
PHY 3: *6e = 0x23e
EnetPhy_findCommonNwayCaps: PHY 3: no common caps found

EnetPhy_findCommonNwayCaps: PHY 3: no common caps found

4 months ago

0 Shaunak Deshpande 4 months ago

TI__Genius 16412 points

Hi,

1. Can you please share what version of the AM263x MCU+ SDK are you using?

2. Is this AM263x-CC, AM263x-LP or some custom board?

Based on the above points, we can debug further

Regards,
Shaunak

0 ych_chn 3 months ago in reply to Shaunak Deshpande

Intellectual 345 points

Hi,

1.mcu_plus_sdk_am263x_10_00_00_35

2.AM263x-CC, AM263x-LP do not support 1000 base-x, so are custom boards

0 Shaunak Deshpande 3 months ago in reply to ych_chn

TI__Genius 16412 points

Can you let me know what PHY strapped settings are you using? Seems like there is some error during negotiation.

Regards,
Shaunak

0 ych_chn 3 months ago in reply to Shaunak Deshpande

Intellectual 345 points

RX_D0=MODE3（In order to be compatible with AM263x-LP address），RX_D1=MODE0（Default）,JTAG_TDO=MODE1,RX_D2=MODE0（Default）,RX_D3=MODE0（Default）,so FUNCTIONAL MODES is FUNCTIONAL MODES，LED_0 = =MODE1(Fiber Force mode)，LED_1 =MODE1(Configure Pin 24 as Signal Detect Pin)。

PHY BMSR shows that it has been linked up, so there should be no problem with strapped settings, right?

0 Shaunak Deshpande 3 months ago in reply to ych_chn

TI__Genius 16412 points

1. Since this is a custom-board, I would recommend having a schematics review with TI (ignore if already done)
2. If possible, please probe the clocks and verify if there is no issue with Clocks (1000Base = RGMII = 125MHz clock should be visible), Ideally probe near both SoC and PHY to confirm signal integrity

3. I also came across another E2E where RGMII-1000BaseX mode required some configurations, I recommend checking that out as well: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1408358/am2634-dp83869-in-fiber-mode---how-to-configure-it

By default there are some issues with 1000BaseX mode in SDK Driver code, Some changes are required in the phy driver register writes to get the driver working consistently.

I will also tag our PHY team expert Evan Mayhew for more comments.

Regards,
Shaunak

+1 ych_chn 3 months ago in reply to Shaunak Deshpande

Intellectual 345 points

Thank you for your reply. My problem has been solved~

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DP83869HM: AM2634 EnetPhy_findCommonNwayCaps: PHY 3: no common caps found