Part Number: DS160PT801
Hi Sir,
My customer is currently testing the DS160PT801, and the system architecture is shown below.
The customer has tested all Hex files included in the DS160PT801_EEPROMImage package; however, in all cases, the REFCLK_OUT pin does not output a clock signal to the end device.
REFCLK_OUT could not be driven to the device with those images.
However, I found the following hex file from this E2E post.
DS160PT801_.x8_clkreq_refclkout.hex: DS160PT801_.x8_clkreq_refclkout.zip
With this firmware version, REFCLK_OUT can be successfully output. The current situation is summarized below:
The customer believes that the issue may be related to a CDR cannot LOCK condition, which could be causing REFCLK_OUT not to output a clock signal.
They would like to ask whether the SIGCONARCHITECT3-WRTE GUI provides any information or status indication related to CDR lock.
In addition, since the RX PLL data rate is only instantiated at the Gen1 level, are there any specific items that we should further check, such as: schematics, hex file settings?
We would appreciate your guidance on how to further debug this issue.
