Part Number: DS160PT801
Hi Team,
As shown in the attached block diagram and schematics, we are using the Retimer DS160PT801ACBR on our Gen4 x8 PCIe endpoint board. The endpoint controller is AMD Gen3 RFSoC ( using GTY banks).
I request your support for reviewing the attached schematics implementation for the DS160PT801ACBR. Your input on this is greatly appreciated, as it will help identify and correct any gaps or mistakes in the implementation.
Additionally, a few questions came to mind during the schematic implementation. Could you please review the points below as well?
- On the DS160PT801ACBR EVK, they have used an external clock buffer/generator to provide clock to retimers and end point device, hope this is due to the dual chip implementation in the EVK. Since my design is only for x8 with single chip, I have given the PCIe reference clock received from PCIe connector to the REFCLK pin of DS160PT801ACBR and the REFCLKOUT of Retimer to the RFSoC as PCIe reference clock input. Please confirm there won’t be any issu es with this implementation.
- I’m using the AMD RFSoC PS I2C as a master to control the DS160PT801ACBR. The same I2C bus is also connected to other slave like current monitor (refer the attached ppt ‘I2C’). Do you see you any problem here?
Regards,
Ajmal Rashid
I2C.pptxPCIe-Retimer-BD.pptxGen4-x8-PCIe-Retimer-DS160PT801ACBR.pdf