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LMH1982 - Reference Detection, H_ERROR

Kawai
Guru 19775 points
Other Parts Discussed in Thread: LMH1982

Please tell me how LMH1982 detects H_ERROR.

When (Hsync input / reference divider) and (VCXO clock / feedback divider) has phase error, there should be some "threshold" or "Time Window" for LMH1982 to decide the reference is not present. (How the device decide H_ERROR).

.

What is the "Threshold" or "Time Window" for the device to detect H_ERROR ?

Please also tell us, whether the Time Window is generated based on (VCXO clock / feedback divider) or (Hsync input / reference divider) .

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I have read the datasheet P.21, "6.1 Reference Detection" and "6.1.1 Programming the Loss of Reference Threshold".

Best Regards,

Kawai

  • 0
    TI__Mastermind 32575 points

    Hi Kawai,

    Detailed answers to these questions can be found in the following E2E forum post:
    http://e2e.ti.com/support/interface/high_speed_interface/int-high_speed_interface/f/140/p/178827/691492.aspx#691492

    Regards,
    Alan

  • 0 in reply to Alan O
    Guru 19775 points

    Alan-san,

    As the same with the NO_LOCK question, we cannot access the linked page.

    Could you give us the information in the linked page ?

    .

    I am understanding that phase detector sees the phase error between Hsync and (VCXO / Feedback Divider).

    What would be the phase error threshold for the device to determine LOR (Hsync lost) ?

    .

    Best Regards,

    Kawai

  • 0 in reply to Kawai
    TI__Mastermind 32575 points

    The reference detector monitors the number of missing reference pulses at the PLL1 Phase Detector (PD) input as well as the loop filter voltage to the VCXO.  The reference input timing is compared by the PD against the feedback input timing; any reference pulse missing during the feedback clock period is counted.  If the number of consecutive missing pulses exceeds the user-programmed LOR threshold or the loop filter voltage is within 500 mV of the GND or Vcc rails, it will indicate a loss of reference.  Note that NO_REF may go high before the number of missing pulses exceeds the programmed LOR threshold since it's possible for the loop filter voltage to drift more quickly to the GND or Vcc rails.

    Regards,
    Alan

  • 0 in reply to Alan O
    Guru 19775 points

    Alan-san,

    Thank you for your reply. I have two additional questions.

    .

    1) What is the threshold (Time window) for the device to detect Hsync pulse is missing ? (i.e. phase error is xx ns)

    2) Where is the point that the device detects the phase error ?

       --> Is it from 50% point of Hsync down pulse to 50% point of (VCXO/Feedback Devider) clock up pulse ?

      .

    We want to understand how much margin we have for LMH1982 to determine NO_LOCK=1 or NO_REF=1 in the system, as LMH1982 outputs NO_LOCK=1 once in a few days.

    .

    Best Regards,

    Kawai