This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65LVDT388A DBT package: Simple Design Question!

Other Parts Discussed in Thread: SN65LVDT388A

This is just a design question concerning the LVDT388A in the DBT package.

In my design, I have ground coming in on the lvds side of the chip connected to the AGND's from an lvds signal. I assume the GND should be connected to the ground from the chip's power supply (in this case from a regulated source) but am uncertain how to proceed for the DGND's and DVcc. The LVTTL side of the chip is going to be read in by a National Instruments FPGA so I assume the DGND should be directly connected to that. Where should the connection to DVcc come from and what voltage should it be at? Any information would help. Thanks!

For reference the datasheet is posted here:

  • Hi nonnoodlez,

    DVCC is a 3.3V supply and can be connected either to VCC or a separate supply. The system should have all GND’s connected together to minimize the chance of a ground offset between devices.

    Please let me know if this helps.