Hi all,
Please let me know the internal pulldown resistance of a PDB terminal of DS92LX2122.
Regerds,
Hisa Kobayashi.
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Hi all,
Please let me know the internal pulldown resistance of a PDB terminal of DS92LX2122.
Regerds,
Hisa Kobayashi.
Hi Hisa-san,
Each of the LVCMOS control input pins have an active internal pullup/pulldown. The value of the pullup/pulldown is about ~20uA.
Dac Tran
SVA APPS
Hi Dan Tran san,
Thank you, e-mail reply.
By the way, although 22uF is contained in the PDB terminal at EVM, why is it?
Moreover, if these 22uF is not contained, what will happen?
Regerds,
Hisa Kobayashi.
Hi Hisa-san,
I assume you are referring to the 22uF on PDB pin from the 903/4 EVK schematics. Since PDB is connected VDDIO, the 22uF is used to delay the PDB signal to ensure the VDD power supplies have settled, otherwise PDB should be controlled by the host processor. The PDB pin requirements are described on DS90UB903/4 datasheet page 31 in the “POWER UP REQUIREMENTS AND PDB PIN” section.
Dac Tran
SVA APPS