Hi TI-support
In my motor control design I’m using a digital isolator supplied by one of your competitors. This device is causing troubles: While having the isolator’s output supply within specifications but powering-up or down the isolator’s input supply the isolators output behave more or less randomly (independent of the isolator’s input states, which stay stable). As I use these randomly behaving isolator outputs to control power electronics, it happens (not often, but it happens) that the random control signal combination leads to HW damages during power cycles.
Looking around for alternatives I found TI’s digital isolators. The device which would fit nicely in my application is ISO7140CC or ISO7140FCC respectively. If I understood it correctly, the one and only difference between these two devices is the fail safe state; suffix F indicates that default output state is low; otherwise, the default output state is high.
My kind of paranoid questions points to if the TI isolators are facing the same issues as the currently used isolators from your competitor:
1) In my application I need a determinate isolator output state as long as the isolator’s output supply (Vcc2) is within specs.Of course the isolator output depends on the isolator input state and isolator’s input supply level (Vcc1), but it must be determinate at all levels (0..5V) of the input supply, also for low supply voltage rise/fall times. No undetermined / random spikes are allowed. Can the ISO7140CC / ISO7140FCC guarantee this requirement? I’m asking this question as it is not clear to me out of the datasheet: My interpretation out of the datasheet table_1 is, that while Vcc1 is below 2.1V, the isolator output is in the fail safe state (H or L depending on part suffix). While Vcc1 is above 2.7V, the device is fully operational and the output is equal to the input. But how the device behaves when Vcc1 is between 2.1V and 2.7V? Is the isolator output determined in this condition? If yes, how? If no, what are the device limitations?
2) What I do not really understand is how the isolator output circuit realizes that the isolator input circuit is not supplied. Is there a kind of watchdog checking the arriving pulses on high- and low-frequency channels? When not receiving pulses for a certain timeout time, the watchdog brings the isolator output into the safe state? I’m asking because I did not find anything in the datasheet nor in application notes slla284 or slyt335. Is there documentation on that topic? Just wondering…
3) One thing I’m also not sure about is the “under voltage threshold”, shown in Figure_14: My interpretation is the following: When the isolator input supply Vcc1 is below this “under voltage threshold”, the isolator output gets in fail safe state. Means “under voltage threshold” is actually the same as the 2.1V mentioned above (out of the datasheet’s table_1), but the 2.1V is the guaranteed minimum, while figure_14 shows temperature related typical values. Is my interpretation correct?
What also kind of confuses me is Figure 3. There, the under voltage threshold is drawn with 2.7V. Am I misinterpreting something there too?
4) Is there also a under voltage lockout mechanism supervising the isolator output supply (Vcc2) and preventing the isolator outputs from undefined behavior? (Of course only to a certain level of supply voltage)
5) Last but not least: Another candidate for my design would be ISO7240C/ISO7240CF: Which part out of ISO7240C/ISO7240CF or ISO7140CC/ISO7140FCC would you recommend for a new design targeting for long product life times?
Many thanks in advance for your help!
Stef
