TL16CP754CIPM Baud rate Questions

Hi Kevin,

I am sorry this question has gotten moved twice, but I am going to move your question to the Consumer and Computing forum so that it can get the proper support and visibility. They should be able to address you question.

Thanks!

John

Hello Kevin,

The baud rate tolerance might vary, its value depends on several factors. Could you share the following information in order to provide a range?

1. Desired Baud Rate

2. Crystal input frequency

3. Prescaler value

4. Divisor Used

5. UART frame format

Regards.

1.    Desired Baud Rate

38400, 9600, 4800

2.    Crystal input frequency

18.432MHz

3. Prescaler value

Divide by 1, Prescaler Logic 0 (MCR[7] = 0)

3.    Divisor Used

30 (Baud Rate = 38400)

5. UART frame format

  Parity= None, Data Bits=8, Stop bits = 1

Hello Kevin,

The baud rate tolerance of the TL16C754C should be -4.5% and +5% for clean edges on the received signal.
(Start Bit, 8 Data bits, no parity and Stop Bit).

As you might have noticed  by increasing/decreasing the divisor, the value can be out of tolerance range. For example, using a 18.432 MHz Crystal.

Regards.

HI Joel,

I hope so  , But actually only -4.1~"+0%", We do experiments by reducing the divisor. the tolerance is not changed. This is just moved. we need your supporting what reason for?

Hi Kevin,

Is there any deviation of the 18.432 MHz  crystal?

Does the issue occur with different programmed baud rates?  By this I mean with the baud rates you've mentioned above ( 38400, 9600, 4800 ). Did you get a similar tolerance range ( -4.1~"+0%") ?

“ We do experiments by reducing the divisor”
What  divisors  are you using in your test that are within the tolerance range for each of these  baud rates  ? Did you test increasing the divisor?

Could you post the crystal spec?

Regards.

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Does the issue occur with different programmed baud rates?  By this I mean with the baud rates you've mentioned above ( 38400, 9600, 4800 ). Did you get a similar tolerance range ( -4.1~"+0%") ?

A:YES

What  divisors  are you using in your test that are within the tolerance range for each of these  baud rates  ? Did you test increasing the divisor?

A: the key issue  is just moved not   enhance  wide range. 

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Hi Kevin,

Could you tell me what do you mean with "But the tolerance does not change. It is just moving"?

What are the steps you are taking to reproduce this issue? and what are the results you get?

Regards,

Aldo

Kevin,

The TL16C754C can encounter framing errors when receiving a stream of characters with short STOP bits.

Could you use 1.5 or 2 stop bits in order to know if this is a related issue?

Regards.

HI,

OK, How about  tolerance baud rate for TL16C754C? Customer want to know that. The Competitor is -4~+4%

Hi Kevin,

The tolerance baud rate for TL16C754C is ~+-5% with 2 stop bits in the packet configuration. When there is 1 stop bit, tolerance baud rate is reduced, as you said (this is because the errata). 

Regards,

Aldo.

HI 

1.The tolerance baud rate for TL16C754C with 2 stop bits in the packet configuration--test by customer  only +1.X,-3.X%,Could you please verify it?

2. Customer can't  configure 1 stop bit in transmission and then receive by 2 stop bits 

Hi Kevin,

1. What are the conditions for his test (baudrate and crystal)?

We've tested with a 20MHz crystal and a pair of baudrates. These are our results:

Baudrate                          Tolerance

38400                               ~+4% ~-6%

4800                                  ~+5% ~-5.7%

2. It must be configured to 2 stop bits both transmitter and receiver.

Regards,

Aldo.

HI 

1.baudrate 38400 and crystal:18.432MHZ

2.Customer can't configured to 2 stop bits

Do you have any way to do it?

Hi Kevin,

1. Unfortunately, we don't have a 18.432 MHz crystal, but with the measurements on the 20 MHz crystal it's enough.

 2. The TL16C754C's Internal Registers are only reachable through Address and Data buses. In order to avoid the errata, the UART's configuration must be to 2 stop bits.

Regards,

Aldo.