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SN65HVD232Q The output status at low vcc

Hi,

I have a question.

If VCC is less than  3V, what is the state of the output?

Since this device does not have UVLO, I think that the output will be maintained High or Low and eventually become Hi-Z.

Is it correct?

Best regards,

Tomoaki Yoshida

  • Hello Tomoaki

    This value is out of the our recommended operating conditions (just a reminder).

    In these devices (including hvd230 and 231) the bus pins are maintained in high-impedance state during low Vcc condition to ensure glith-free, power-up and power-down bus protection for hot-plugging apps. This high-impedance means that an unpowered node won't disturb the bus.

    In figure 23 you can see a very low current level when Vcc is low than 3V, with this one you can have better idea about it.

    Please let me know your comments and if I can help you with something else.

    Best regards

    Francisco