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DP83640 SYNC for IEEE1588 + Development Tools

Other Parts Discussed in Thread: DP83640

The video on the Product page for the DP83640 was informative, particularly the portion that shows the sync capabilities.  For our implementation, we would like to use the DP83640 in tandem with EtherCAT.  We would like to do some basic internal development while we design our boards for a new system.

Before we can determine if the DP83640 will work in our system, we have some basic questions:

1. How do we replicate the functional system shown in the DP83640 video?

2. What firmware is needed to synchronize client PTP systems to a master PTP clock, with the IEEE1588 PTP hardware accelerated DP836040 PHY.

3. What is done in hardware and what is done in software.

4. Where can we obtain the hardware required?

5. What features are provided/included?

6. Ease of customization, and with what development tools?

7. Estimate of additional firmware that might be required for customization.

Any other recommendations/guidance would be greatly appreciated - Thank you!

 

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  • This will require a software effort.  There is a software development guide describing the functionality available at:

    http://www.ti.com/tool/dp83640sw-lib

     The demo shown on the Product Folder page video relies on an FPGA board and software.  Alignment of the clocks is achieved through IEEE 1588 PTP.  The software in the demo is running an IEEE 1588 PTP stack and controlling both EVMs via the FPGA.  It is not possible to do a simple proof of concept using register access and EVMs.

  • Correct. Thank you for posting this.

    Patrick
  • As we continue this development, and the desire to use the DP83640, but first the evaluation must be completed and verified operational.  To accomplish this, an evaluation platform is required, in fact, we have several and used the Ethernet Phyter Library software and development guide, but progress has been very limited.  Part of the challenge is to:

     *Develop a Linux based ptp master clock control board with an ARM CPU.
     *Develop a Xilinx FPGA ptp slave clock module.

    Unfortunately the windowsXP-based Library depends upon XP and the EPL board, but these are no longer available.  We have only been able to  change some register values via the USB/MDIO (Kelly tool) for a manual clock synchronization.  Which now leads to:

     *What software/hardware do we need to synchronize the clocks on a pair of eval boards?
     *Are there a preferred set of Linux kernels/PTP Drivers/Stacks, for example: linuxptp & ptpd?
     *Is there any information/designs for driving the PTP slave from an FPGA or microcontroller?

    Any assistance with achieving the tight synchronization only offered by the PHYTER will be greatly appreciated!.

     

  • Hi Leonard,

    It seems like the roadblock to demonstrating the 1588 synchronization in our reference material is the lack of available hardware around the DP83640.  As you have correctly identified, the HW solution used in most of the EPL development is no longer available.

    The Linux PTP project is the preferred starting point for the SW portion of the design.  All the information available is contained in the DP83640 Software Development Guide, EPL and app notes.

    Best Regards,

  • Thanks for the update, Rob.  Do we have a recommended hardware platform for development?  If the original hardware is no longer available, what can replace it?  Otherwise, how is development recommended to be accomplished?

    ~Leonard 

  • Hi Leonard,

    We currently do not have a platform or recommended platform. The current plan is to have the customer provide the hardware and use the Linux PTP project Rob mentioned above.

    Kind regards,
    Ross
  • okay, thanks . . . can we provide any guidance to a customer as far as the type of hardware required, or they have to come up with their own platform?
  • Hi Leonard,

    There are many FPGAs and processors that now support IEEE 1588. I am not sure what you are looking for?
    Do you want us to provide a full solution to them? I would think they have a processor or FPGA or ASIC selected already and are just looking for a 1588 capable PHY. Is this not the case?

    Kind regards,
    Ross
  • We are using the DP83640, and what we are looking for is help with implementation of the PTP Linux Project on an Altera Cyclone V SoC.

    This really is a straight forward request, I dont know why there is so much confusion and back and forth...

  • Hi,

    We are a PHY hardware group and do not include a software support team. When the 640 was released, we included multiple reference guides to help people use the 640 for PTP. If there are specific questions regarding the 640's implementation we will be happy to assist, however, questions related to other company products are outside the scope of this forum. 

    Kind regards,

    Ross