Because of the holidays, TI E2E™ design support forum responses will be delayed from Dec. 25 through Jan. 2. Thank you for your patience.

  • State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 32 subscribers
  • Views 730 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCA9548A: Questions about TCA9548A

Yuntao Yu
Prodigy 410 points
Part Number: TCA9548A

Hi experts,

I got some questions from customer on TCA9548A. Could you please kindly comment on them? Thanks!

1. Could you explain in more detail (or give examples) on the terminology “tpd” and “trst”?

2. For “trst”, from note (2) in above, it means “the propagation delay measured from the time the RESET pin is first asserted low to the time the SDA pin is asserted high”. Could you identify “trst” in below picture?

Note: Yellow is RST, violet is SCL, and green is SDA.

3. For “trst”, it is 500ns maximum, while, in note (2), “It must be a minimum of tWL.”  Does that mean tWL< trst <500ns ??

4. For “tpd”, what does “from SDA or SCL(INPUT) to SDn or SLn(OUTPUT)” mean? For instance, does it mean the time  from the falling SCL to the rising SDA in a read operation? Like the red cycle marked in below picture?

 

  • 0
    TI__Guru 70762 points

    Yuntao,

    Thanks for coming to E2E for support.

    1. The propagation delay time is the time it takes for the SDn or SCn output to respond to a rising or falling edge on the SDA or SCL input, respectively; meaning if a falling edge is recognized by the input at t = 500ns, the output will respond with a delay based on the load capacitance of the signal trace/cable. 

    2. Looking at your scope shot, it doesn't actually look like the reset is being triggered once the RESET pin is asserted low. Your SDA line should go low then high very shortly after the RESET is asserted. I see the SDA line go low then high, but after about 60us, which is too long, and it looks like that pulse is just a part of your patterned waveform.

    3. Yes, that is what that means, but twl doesn't seem to be listed in the datasheet, let me look around and see where that designator came from.

    4. No, it means from SDA input to SDn output or SCL input to SCn output. You can think of propagation delay as the "travel time" of the signal to go from input to output of the device.

    Regards,