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Original question:

DS90UB954-Q1: pull-up or pull-down resistors on Pins 44 and 6

DS90UB954-Q1: BIST mode error

Lin Sen
Intellectual 260 points
Part Number: DS90UB954-Q1
Other Parts Discussed in Thread: DS90UB913A-Q1,

Hi，

We are having trouble in debugging our new serdes circuity. After pulling BISTEN high, we got LOCK signal acting as a pulse with very short high time. Do you have any clues?

Going through spec of 954, 'During pin control BIST, the values on GPIO1 and GPIO0 pins will control whether the Serializer uses an external or internal clock for the BIST pattern. The values on GPIO1 and GPIO0 will be written to the Serializer register 0x14[2:1].'

Does it mean, 954 will sample GPIO0/1 of 954 and use them to decide 953's clock source?

Below is snapshots of our sch, please kindly help to review and provide your feedback.

Thank you and look forward to hearing from you as soon as possible.

Bgs/Sen

  • 0 in reply to Lin Sen
    TI__Genius 10475 points
    Hello,

    To verify BIST is working properly you can monitor the error counter through BIST_ERR_COUNT register 0x57 in 954. Instead of BISTEN pin you can also enable BIST through register control. Refer to datasheet section 7.5.12.2.

    Are you selecting external or internal clock as reference on the serializer side? This can be controlled via GPIO 0/1 values written into serializer register 0x14[2:1]. A value of 00 will select an external clock.

    From the datasheet:

    The BIST clock frequency is controlled by the BIST_CLOCK_SOURCE field in the BIST_CTL register. This 2-bit
    value will be written to the Serializer register 0x14[2:1]. A value of 00 will select an external clock. A non-zero
    value will enable an internal clock of the frequency defined in the Serializer register 0x14. Note that when the
    DS90UB954-Q1 is paired with DS90UB933-Q1or DS90UB913A-Q1, a setting of 11 may result in a frequency
    that is too slow for the DS90UB954-Q1 to recover. The BIST_CLOCK_SOURCE field is sampled at the start of
    BIST. Changing this value after BIST is enabled will not change operation.
  • 0 in reply to Palaniappan Manickam
    Intellectual 260 points
    Hi Palaniappan,
    Thank you very much for the quick response.

    We make some changes:
    1. use external clock for 953;
    2. set GPIO0/1 to 00;
    BIST mode is OK, but only under coax mode.

    By checking table1 of 954 spec, we believe it is because we somehow set the system into CSI-2 synchronous mode.
    But the cable we are going to use in mass production is STP type. Could you please help to check how to enter CSI-2 async mode?
    Are there any performance difference between Async and Sync mode? Especially bandwidth...

    Thank you and look forward to hearing from you.
    Rgs/Sen
  • 0
    TI__Mastermind 30515 points
    Also, please check your cable in your case, does it match the UB953 application? generally Dacar302/462 is recommended.

    best regards,
    Steven
  • 0 in reply to Lin Sen
    TI__Mastermind 30515 points
    reg 0x03 of UB953 can be set for async. application. thanks.

    best regards,
    Steven
  • 0 in reply to Steven(Shenzhen) Shi
    Intellectual 260 points

    Hi Steven,

    But problem is, our design and cables are based on STP mode. In STP mode, we can not even LOCK properly in BISTEN=H mode, which means there is no way to communication with 953(Processor can only access 954).

    If we debug our board to coax mode, I2C is OK. But all in all, our design, our cables are STP mode, we don't want coax mode.

    Any idea why we can not access 953 under STP mode?

    Thank you!

    Rgs/Sen

  • 0 in reply to Lin Sen
    TI__Mastermind 30515 points
    STP also is acceptable for UB953. if selecting STP, please set it in mode_sel.

    best regards,
    Steven