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TPS65983B: TPS65983B

Part Number: TPS65983B

Hi there,

We are currently building Thunderbolt3 FW (Titan Ridge - Tapex Creek TI83) and need to include PD FW in Thunderbolt EEPROM. Our application only use Thunderbolt3 to PCIe. There are two Intel JHL7440 ICs and each JHL7440 has two PDs (one downstream and one upstream). The downstream will be depopulated since there will be no cascade downstream device. This is our EVT build and we keep it just in case. We will not use DP, USB, power charging from upstream or to downstream device. No USB2.0 connection from PD to JHL7440. The power is self power. The PP_5V is from our PCB 5V VR and it can support 2.5W per each PD. The VBUS is connected to USB C (Thunderbolt 3) connector. The schematic had been checked by your team and confirmed no problem. Some questions need your help. 

1. I requested the PD FW and got TPS65983_FW_6.61_Windows & TPS65983_FW_4.61_Windows from your side. What is the difference between these two? I'm using TPS65983_FW_6.61_Windows for now. 

2. I attached the pjc file and need your help to check if anything need to be modified. 

S19 PD FW Project 20190616.zip

S19 PD FW setting.pptx

  • Hi Alex,

    For TPS65983B, the 6.x firmware is PD3 compatible and the 4.x firmware is PD2 based.

    I cannot review the entire project file because many settings are based on your design and implementation. The configuration GUI will prevent any illegal or conflicting settings. Are there particular sections you are concerned about?

    Thanks,

    Scott

  • Hi Scott, 

    Thanks for the reply. Here are some items we would like to clarify with you. 

    1. From the new project selection, we are using Titan Ridge DD but will not use bus power. Is it ok to select Tapex Creek ATX?

    2. Transmit Source Capabilities - We are setting 5V 0.5A per port. We will not use power charging either from host or to device. PD power will come our PCB 3V3 VR. Is it ok?

    3. Tx Source Capabilities Extended will use default setting since I am not familiar with all the settings and would like to keep it as default to avoid any issue. 

    4. Number of UFP will change from 3 to 1. Since the number of PDO seems to be the same as number of UFP. The number of PDO will be 1 if input source is 5V only. 

    5. Transmit Identify Data Object - Product type will change from Peripheral to passive cable. We are using Thunderbolt 3 passive 500mm cable.  

    Alex

  • Hi Scott, 

    Any update on this? One more question, I can merge low region binary file into TBT but I am unable to merge PD full flash image into TBT FW. When I merge the full flash image, the total FW binary file size is 0. Is there any concern on merging low region only? We are building the PCB next Monday. Need your response. 

    Alex

  • Hi Scott, 

    Currently we built the board with Intel JHL7440 with TPS65983BAZQZR PD and this is quite urgent. We can not get the PCIe device using JHL7440 PCIe link. We are not sure if the problem is at PD or JHL7440 side. We did not use power bus bar function. We simply provide 5V 0.5A per port to PP_5V0 and VBus connected to USB C connector power pin. We dd not use USB mux function. So I need your help of how to determine the PD is ready? 

    Alex

  • Hi,

    The TPS65983B can receive input power from VBUS or Vin3V3. If there is no power on Vin3V3 then the device will start in a "dead battery" mode.

    If the PD is powered then you should see voltage on the output LDO lines (LDO_1V8, LDO_3v3).

    There should also be an IRQ on I2C2 to indicate the device has finished loading its firmware.

    Regards,

    Scott