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SN65LVDS180: VOD to 500~ 600 mV

Shu-Cheng LIN
Guru 11785 points
Part Number: SN65LVDS180
Other Parts Discussed in Thread: SN65MLVD203

Hi Sirs,

Sorry to bother you.

We are survey High-Speed Differential Line Drivers and Receivers, like SN65LVDS180 function.


But we need Differential output voltage magnitude around 500-600mV.
Does TI have solution can share?

 

    

  • 0
    TI__Genius 10250 points

    Hello,

    Do you need the common mode to be 1.2V?  If so, then one option is SN65MLVD203.  It is an M-LVDS transceiver and you need to use two 100 ohm terminations, one at the driver and one at the receiver side.  With 2 terminations, it provides a differential output of 480 to 650 mV. It provides additional advantages over regular LVDS, including better control of the reflections (due to the double termination), and better noise margins due to 50mV receiver threshold (instead of 100 mV for regular LVDS).  Please take a look and see if this device will satisfy you requirements.  If not, please tell us more about your requirements and we can look at other devices.

    Regards,

    Yaser

  • 0 in reply to Yaser Ibrahim
    Guru 11785 points

    Hi Sirs,

    Thanks for your reply.

    When I'm testing Display Port,  the Aux Channel Eye Test (Source) was fail, please refer eye diagram as below,

    Looks TI_SN65LVDS180PW Differential output voltage is not high enough, so does TI have DP Aux Channel-specific materials?

    As shown in the following circuit diagram, We just need to change SN65MLVD203, the differential output voltage should be larger.

    Question is M-LVDS SN65MLVD203 100 ohm terminations as shown below blue circle?

    Display Port requires 100 ohm terminations, but the following diagrams are 50 ohms. Is this going to be a problem?

  • 0 in reply to Shu-Cheng LIN
    TI__Genius 10250 points

    Hello,

    SN65MLVD203 will give you higher differential voltage which is 480 to 650 mV with two 100 Ω terminations (this is not peak-to-peak, by the way; peak-to-peak will be double this voltage).

    The termination should be 100 Ω, but there expected to be 2 of them, so the test circuit in Fig 2 has a 50 Ω (equivalent of two 100 Ω terminations in parallel). I am not that familiar with Display Port, but I believe you normally have one 100 Ω termination at the source and another 100 Ω termination at the sink side. I also assume you have the common mode setting network etc. (please refer to the DP AUX structure in the Display Port spec.). Also, please notice the locations for monitoring the signals in the Test spec.

    Regard,

    Yaser