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DS92LV3221: fundamental question

Yasushi Fujiwara
Genius 12295 points
Part Number: DS92LV3221
Other Parts Discussed in Thread: DS92LV3222

Hi Experts,

I have several question as follows. Would you please answer them?
1. Why DS92LV3221 has two LVDS outputs?
2. I saw a datasheet but I don't understand how DS92LV3221 encode 32 bits parallel data to serial data. Would you explain how to encode parallel data to serial data? (bit arrangement and so on.) If you have any application note and so on, please provide it.
3. If LVDS line is disconnected while transfer the serial data, DS92LV3222 parallel output will be low or Hi-Z or something? I think DS92LV3222 may start re-synchronization but I don't understand DS92LV3222 parallel outputs state during re-synchronization.

Your support would be much appreciated.
Best Regards,
Fujiwara

  • 0
    TI__Genius 12866 points

    Hi Fujiwara,

    1. The part is designed to have two LVDS outputs to support up to 2Gbps bandwidth. Each output can support up to 1Gbps.

    2. In general, each LVDS link carries 20 bits of data, total of 40 bits over two LVDS outputs. The 40 bits includes clock bits, control bits, and the 32bits video. The detailed bit arrangement and how the encoding is done is proprietary information.

    3. In this case, output from DS92LV3222 may still be active. However, after the LVDS line is disconnected, the LOCK signal should be low which indicates that the output is invalid. 

    Best Regards,

    Charley Cai