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Dear Sirs,
We choose the TI AM3354 which connect to SN75LVDS83B to implement 24-Bit Color Host to 24-Bit LCD Panel Application.
After I read the datasheet of SN75LVDS83B, the page 28, Layout Guidelines, didn't mention the length mismatch and Max. total trace length.
Please provide the Layout Guidelines of SN75LVDS83B which we need including those items below. Thx!
1. LVDS length matching between P and N within a diff pair
2. LVDS maximum length mismatch between data lanes
3. LVDS max. total trace length
4. Data bits(RGB) length matching
5. Data bits(RGB) Max. total trace length
Best Regards,
Rudy Tsao
Hello Rudy,
1. Between p and p is <5mils
2. Between pairs is <50mils
I will continue to look up the rest of your questions
Hi Sally,
Got it. I will wait for your further response. Thanks!
Best Regards,
Rudy Tsao
3. LVDS max. total trace length <4000mils -- need to use this appnote to calculate the ‘e’ (cable skew length) -- http://www.ti.com/lit/an/snla050/snla050.pdf
4. Data bits(RGB) length matching <5mils
5. Data bits(RGB) Max. total trace length <4000mils -- this value may be smaller depending on max freq and resultant rise/fall time. please see appnote above for estimate
Please note that the max total trace legnths may be shorter due to your board design. You may need to simulate/multiple spins to ensure the noise is not too high.
Hi Sally,
4. Please see the functional diagram of SN75LVDS83B below. What I mean is that the input signals (Data bits - RGB) are 28 bits of single-ended LVTTL data and the length matching may including CLKIN and CLKSEL, so all input signals aren't differential pairs.
What I really want to know Q4 and Q5 that the value of those input signals (single-ended) length matching and max. total trace length are?
Best Regards,
Rudy
Hi Rudy,
For single ended you may follow the length matching within a group and follow the total length matching as stated previously.