SN65DSI84: Questions for SN65DSI84 no video output issue

Jacky Wang(QD)

Part Number: SN65DSI84
Other Parts Discussed in Thread: DSI-TUNER

Hi Experts,

Our customer is using our SN65DSI84 in their design for the MIPI to LVDS display, but they are facing no video output issue after the normal initialization. They checked the test pattern can be displayed normally. Also, when no video output, the error register 0xE5 read back is always 0x01 after writing 0xFF or 0x00. Do you know what's the problem in here?

Attached is customer's schematic and initialization code, FYI.

SN65DSI84原理图.pdf

sn65dis84_init_table.txt

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        {0x09,              0x00},
        {0x0A ,             0x05},
        {0x0B ,             0x28},  
        {0x0D ,             0x00},
        {0x10  ,            0x26},
        {0x11  ,            0x00},
        {0x12 ,             0x59},//0x2b//0x2a//0x2c //0x35
        {0x13  ,            0x00},
        {0x18  ,            0x6c},
        {0x19  ,            0x00},
        {0x1A ,             0x03},
        {0x1B  ,            0x00},
        {0x20  ,            0x80},
        {0x21 ,             0x07},
        {0x22 ,             0x00},
        {0x23 ,             0x00},
        {0x24,              0x00},
        {0x25,              0x00},
        {0x26 ,             0x00},
        {0x27 ,             0x00},
        {0x28,              0x21},//21
        {0x29,              0x00},
        {0x2A ,             0x00},
        {0x2B,              0x00},
        {0x2C ,             0x0a},
        {0x2D ,             0x00},
        {0x2E ,             0x00},
        {0x2F  ,            0x00},
        {0x30  ,            0x02},
        {0x31  ,            0x00},
        {0x32  ,            0x00},
        {0x33  ,            0x00},
        {0x34   ,           0x18},
        {0x35  ,            0x00},
        {0x36  ,            0x00},
        {0x37  ,            0x00},
        {0x38  ,            0x00},
        {0x39  ,            0x00},
        {0x3A  ,            0x00},
        {0x3B  ,            0x00},
        {0x3C  ,            0x00},
        {0x3D   ,           0x00},
        {0x3E   ,           0x00},
        {0x0D ,           0x01},
        {REGFLAG_DELAY,10},//delay 5ms
        {0x09 ,           0x01},//soft reset
        {0xFF,0x00},//ended flag
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

		{0x09,              0x00},
		{0x0A ,             0x05},
		{0x0B ,             0x28},  
		{0x0D ,             0x00},
		{0x10  ,            0x26},
		{0x11  ,            0x00},
		{0x12 ,             0x59},//0x2b//0x2a//0x2c //0x35
		{0x13  ,            0x00},
		{0x18  ,            0x6c},
		{0x19  ,            0x00},
		{0x1A ,             0x03},
		{0x1B  ,            0x00},
		{0x20  ,            0x80},
		{0x21 ,             0x07},
		{0x22 ,             0x00},
		{0x23 ,             0x00},
		{0x24,              0x00},
		{0x25,              0x00},
		{0x26 ,             0x00},
		{0x27 ,             0x00},
		{0x28,              0x21},//21
		{0x29,              0x00},
		{0x2A ,             0x00},
		{0x2B,              0x00},
		{0x2C ,             0x0a},
		{0x2D ,             0x00},
		{0x2E ,             0x00},
		{0x2F  ,            0x00},
		{0x30  ,            0x02},
		{0x31  ,            0x00},
		{0x32  ,            0x00},
		{0x33  ,            0x00},
		{0x34   ,           0x18},
		{0x35  ,            0x00},
		{0x36  ,            0x00},
		{0x37  ,            0x00},
		{0x38  ,            0x00},
		{0x39  ,            0x00},
		{0x3A  ,            0x00},
		{0x3B  ,            0x00},
		{0x3C  ,            0x00},
		{0x3D   ,           0x00},
		{0x3E   ,           0x00},
		{0x0D , 		  0x01},
		{REGFLAG_DELAY,10},//delay 5ms
		{0x09 , 		  0x01},//soft reset
		{0xFF,0x00},//ended flag

cpt_clap070wp03xg_sn65dsi84-boot-driver.c

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#ifndef BUILD_LK
#include <linux/string.h>
#else
#include <string.h>
#endif
#ifdef BUILD_LK
#include <platform/mt_gpio.h>
#include <platform/mt_i2c.h>
#include <platform/mt_pmic.h>
#include <platform/mt_pwm.h>
#include <platform/upmu_common.h>
#elif (defined BUILD_UBOOT)
#include <asm/arch/mt6577_gpio.h>
#else
#include <mach/mt_gpio.h>
#include <mach/mt_pm_ldo.h>
#include "sn65dsi83_i2c.h"
#endif
#include "lcm_drv.h"
#include "ddp_hal.h"
#define LVDS_PANEL_8BITS_SUPPORT
//#define SN65DSI83_PATTERN
//#define SN65DSI83_SINGLE_LVDS_LK
/* --------------------------------------------------------------------------- */
/* Local Constants */
/* ----------------------------
----------------------------------------------- */
#ifdef SN65DSI83_SINGLE_LVDS_LK
#define FRAME_WIDTH  (1366)//(1080)//(540)//
#define FRAME_HEIGHT (768)//(1920)//(960)// 
#else
#define FRAME_WIDTH  (1920)//(1080)//(540)//
#define FRAME_HEIGHT (1080)//(1920)//(960)// 
#endif
/* GPIO67        LVDS Panel PWR */
#ifdef GPIO_LCM_LVDS_PWR_EN
#define GPIO_LCD_PWR_EN      GPIO_LCM_LVDS_PWR_EN
#else
#define GPIO_LCD_PWR_EN      0xFFFFFFFF
#endif
/* VGP1_PMU       VDD18_LVDS for SN65DSI83 power */
/* GPIO47       LCM_RST for panel */
#ifdef GPIO_LCM_RST
#define GPIO_LCD_RST_EN         GPIO_LCM_RST
#else
#define GPIO_LCD_RST_EN         0xFFFFFFFF
#endif
/* GPIO66       DISP_PWM0 for backlight panel */
#ifdef GPIO_LCM_BL_EN
#define GPIO_LCD_BL_EN          GPIO_LCM_BL_EN
#else
#define GPIO_LCD_BL_EN          0xFFFFFFFF
#endif
/* GPIO121       USB Hub RST    */
#ifdef GPIO_USBHUB_RST_PIN
#define GPIO_USBHUB_RST         GPIO_USBHUB_RST_PIN
#else
#define GPIO_USBHUB_RST         0xFFFFFFFF
#endif
/* GPIO49       USB DRVVBUS PWR */
#ifdef GPIO_OTG_DRVVBUS_PIN
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

#ifndef BUILD_LK
#include <linux/string.h>
#else
#include <string.h>
#endif

#ifdef BUILD_LK
#include <platform/mt_gpio.h>
#include <platform/mt_i2c.h>
#include <platform/mt_pmic.h>
#include <platform/mt_pwm.h>
#include <platform/upmu_common.h>
#elif (defined BUILD_UBOOT)
#include <asm/arch/mt6577_gpio.h>
#else
#include <mach/mt_gpio.h>
#include <mach/mt_pm_ldo.h>
#include "sn65dsi83_i2c.h"
#endif
#include "lcm_drv.h"
#include "ddp_hal.h"

#define LVDS_PANEL_8BITS_SUPPORT
//#define SN65DSI83_PATTERN
//#define SN65DSI83_SINGLE_LVDS_LK
/* --------------------------------------------------------------------------- */
/* Local Constants */
/* ----------------------------
----------------------------------------------- */
#ifdef SN65DSI83_SINGLE_LVDS_LK
#define FRAME_WIDTH  (1366)//(1080)//(540)//
#define FRAME_HEIGHT (768)//(1920)//(960)// 
#else
#define FRAME_WIDTH  (1920)//(1080)//(540)//
#define FRAME_HEIGHT (1080)//(1920)//(960)// 
#endif
/* GPIO67        LVDS Panel PWR */
#ifdef GPIO_LCM_LVDS_PWR_EN
#define GPIO_LCD_PWR_EN      GPIO_LCM_LVDS_PWR_EN
#else
#define GPIO_LCD_PWR_EN      0xFFFFFFFF
#endif

/* VGP1_PMU       VDD18_LVDS for SN65DSI83 power */

/* GPIO47       LCM_RST for panel */
#ifdef GPIO_LCM_RST
#define GPIO_LCD_RST_EN         GPIO_LCM_RST
#else
#define GPIO_LCD_RST_EN         0xFFFFFFFF
#endif

/* GPIO66       DISP_PWM0 for backlight panel */
#ifdef GPIO_LCM_BL_EN
#define GPIO_LCD_BL_EN          GPIO_LCM_BL_EN
#else
#define GPIO_LCD_BL_EN          0xFFFFFFFF
#endif

/* GPIO121       USB Hub RST    */
#ifdef GPIO_USBHUB_RST_PIN
#define GPIO_USBHUB_RST         GPIO_USBHUB_RST_PIN
#else
#define GPIO_USBHUB_RST         0xFFFFFFFF
#endif
/* GPIO49       USB DRVVBUS PWR */
#ifdef GPIO_OTG_DRVVBUS_PIN
#define GPIO_USB_DRVBUS         GPIO_OTG_DRVVBUS_PIN
#else
#define GPIO_USB_DRVBUS         0xFFFFFFFF
#endif

#define GPIO_EDP_EN             0xFFFFFFFF

#define GPIO_SRCLKENAI0_EN      0xFFFFFFFF

/*	GPIO48      System State led*/
#ifdef GPIO_LED_EN
#define GPIO_LED_BACKUP_EN				GPIO_LED_EN
#else
#define GPIO_LED_BACKUP_EN				0xFFFFFFFF
#endif

#define GPIO_AMP_MUTE_EN		0xFFFFFFFF
#define GPIO_AMP_PWR_EN			0xFFFFFFFF

/* GPIO39       5V POWER enable*/
#ifdef GPIO_POWER_STANDBY_PIN
#define GPIO_STANDBY_PWR_EN		GPIO_POWER_STANDBY_PIN
#else
#define GPIO_STANDBY_PWR_EN		0xFFFFFFFF
#endif

#define SN65DSI_DEBUG  //for check system(bb dsi and ti chip) status
/* --------------------------------------------------------------------------- */
/* Local Variables */
/* --------------------------------------------------------------------------- */
static LCM_UTIL_FUNCS lcm_util = {
	.set_reset_pin  = NULL,
	.udelay                 = NULL,
	.mdelay                 = NULL,
};


#define SET_RESET_PIN(v)    (mt_set_reset_pin((v)))
#define UDELAY(n)                   (lcm_util.udelay(n))
#define MDELAY(n)                   (lcm_util.mdelay(n))
#define REGFLAG_DELAY           0xAB

typedef unsigned char    kal_uint8;
typedef struct {
	unsigned char cmd;
	unsigned char data;
} sn65dsi8x_setting_table;

/* --------------------------------------------------------------------------- */
/* Local Functions */
/* --------------------------------------------------------------------------- */
extern void DSI_clk_HS_mode(DISP_MODULE_ENUM module, void* cmdq, bool enter);
//extern void upmu_set_rg_vgp6_vosel(U32 val);
//extern void upmu_set_rg_vgp6_sw_en(U32 val);

#ifdef BUILD_LK

//#define I2C_CH               1 
#define sn65dsi83_SLAVE_ADDR_WRITE      0x58
#define SN65DSI83_I2C_ID                I2C0

static struct mt_i2c_t sn65dsi83_i2c;

/**********************************************************
  *
  *   [I2C Function For Read/Write fan5405]
  *
  *********************************************************/
kal_uint32 sn65dsi83_write_byte(kal_uint8 addr, kal_uint8 value)
{
	kal_uint32 ret_code = I2C_OK;
	kal_uint8 write_data[2];
	kal_uint16 len;

	write_data[0]= addr;
	write_data[1] = value;

	sn65dsi83_i2c.id = SN65DSI83_I2C_ID;
	/* Since i2c will left shift 1 bit, we need to set SN65DSI83 I2C address to >>1 */
	sn65dsi83_i2c.addr = (sn65dsi83_SLAVE_ADDR_WRITE >> 1);
	sn65dsi83_i2c.mode = ST_MODE;
	sn65dsi83_i2c.speed = 100;
	len = 2;

	ret_code = i2c_write(&sn65dsi83_i2c, write_data, len);

	return ret_code;
}

kal_uint32 sn65dsi83_read_byte (kal_uint8 addr, kal_uint8 *dataBuffer)
{
	kal_uint32 ret_code = I2C_OK;
	kal_uint16 len;

	*dataBuffer = addr;

	sn65dsi83_i2c.id = SN65DSI83_I2C_ID;
	/* Since i2c will left shift 1 bit, we need to set SN65DSI83 I2C address to >>1 */
	sn65dsi83_i2c.addr = (sn65dsi83_SLAVE_ADDR_WRITE >> 1);
	sn65dsi83_i2c.mode = ST_MODE;
	sn65dsi83_i2c.speed = 100;
	len = 1;

	ret_code = i2c_write_read(&sn65dsi83_i2c, dataBuffer, len, len);

	return ret_code;
}

/******************************************************************************
*IIC drvier,:protocol type 2 add by chenguangjian end
******************************************************************************/
#else
extern int sn65dsi83_read_byte(kal_uint8 cmd, kal_uint8 *returnData);
extern int sn65dsi83_write_byte(kal_uint8 cmd, kal_uint8 Data);
#endif
/* sn65dis83 chip init table */
static sn65dsi8x_setting_table sn65dis83_init_table[] = {
#if defined(LVDS_PANEL_8BITS_SUPPORT)
#if 1
	#ifdef SN65DSI83_SINGLE_LVDS_LK
	    #if defined(SN65DSI83_PATTERN)
		{0x09,              0x00},
		{0x0A ,             0x05},
		{0x0B ,             0x10},  
		{0x0D ,             0x00},
		{0x10  ,            0x26},
		{0x11  ,            0x00},
		{0x12 ,             0x2c},//0x2b//0x2a//0x2c //0x35
		{0x13  ,            0x00},
		{0x18  ,            0x7a},//tcl:0x78;newway:0x7a
		{0x19, 0x00},
		{0x1A, 0x03},
		{0x1B, 0x00},
		{0x20  ,            0x56},
		{0x21 ,             0x05},
		{0x22, 0x00},
		{0x23, 0x00},
		{0x24, 0x00},
		{0x25,              0x03},
		{0x26, 0x00},
		{0x27, 0x00},
		{0x28, 0x21},
		{0x29, 0x00},
		{0x2A, 0x00},
		{0x2B, 0x00},
		{0x2C, 0x0a},
		{0x2D, 0x00},
		{0x2E, 0x00},
		{0x2F, 0x00},
		{0x30, 0x02},
		{0x31, 0x00},
		{0x32, 0x00},
		{0x33, 0x00},
		{0x34, 0x18},
		{0x35, 0x00},
		{0x36  ,            0x00},
		{0x37, 0x00},
		{0x38  ,            0x00},
		{0x39  ,            0x00},
		{0x3A  ,            0x00},
		{0x3B  ,            0x00},
		{0x3C  ,            0x10},
		{0x3D   ,           0x00},
		{0x3E   ,           0x00},
		{0x0D , 		  0x01},
		{REGFLAG_DELAY,10},//delay 5ms
		{0x09 , 		  0x01},//soft reset
		{0xFF,0x00},//ended flag
		#else
		{0x09,              0x00},
		{0x0A ,             0x05},
		{0x0B ,             0x10},  
		{0x0D ,             0x00},
		{0x10  ,            0x26},
		{0x11  ,            0x00},
		{0x12 ,             0x2c},//0x2b//0x2a//0x2c //0x35
		{0x13  ,            0x00},
		{0x18  ,            0x7a},//tcl:0x78;newway:0x7a
		{0x19  ,            0x00},
		{0x1A ,             0x03},
		{0x1B  ,            0x00},
		{0x20  ,            0x56},
		{0x21 ,             0x05},
		{0x22 ,             0x00},
		{0x23 ,             0x00},
		{0x24,              0x00},
		{0x25,              0x03},
		{0x26 ,             0x00},
		{0x27 ,             0x00},
		{0x28,              0x21},//21
		{0x29,              0x00},
		{0x2A ,             0x00},
		{0x2B,              0x00},
		{0x2C ,             0x0a},
		{0x2D ,             0x00},
		{0x2E ,             0x00},
		{0x2F  ,            0x00},
		{0x30  ,            0x02},
		{0x31  ,            0x00},
		{0x32  ,            0x00},
		{0x33  ,            0x00},
		{0x34   ,           0x18},
		{0x35  ,            0x00},
		{0x36  ,            0x00},
		{0x37  ,            0x00},
		{0x38  ,            0x00},
		{0x39  ,            0x00},
		{0x3A  ,            0x00},
		{0x3B  ,            0x00},
		{0x3C  ,            0x00},
		{0x3D   ,           0x00},
		{0x3E   ,           0x00},
		{0x0D , 		  0x01},
		{REGFLAG_DELAY,10},//delay 5ms
		{0x09 , 		  0x01},//soft reset
		{0xFF,0x00},//ended flag
		#endif
	#else 
		#if defined(SN65DSI83_PATTERN)
		{0x09,              0x00},
		{0x0A ,             0x05},
		{0x0B ,             0x28},  
		{0x0D ,             0x00},
		{0x10  ,            0x26},
		{0x11  ,            0x00},
		{0x12 ,             0x59},//0x2b//0x2a//0x2c //0x35
		{0x13  ,            0x00},
		{0x18  ,            0x6c},
		{0x19  ,            0x00},
		{0x1A ,             0x03},
		{0x1B  ,            0x00},
		{0x20  ,            0x80},//horizontal line 7:0 //low bit //1920
		{0x21 ,             0x07},//horizontal line 3:0 //high bit
		{0x22 ,             0x00},
		{0x23 ,             0x00},
		{0x24,              0x04},//0x04//vertical line 7:0 //low bit //1080//test pattern need
		{0x25,              0x38},//0x38//vertical line 3:0 //high bit
		{0x26 ,             0x00},
		{0x27 ,             0x00},
		{0x28,              0x21},
		{0x29,              0x00},
		{0x2A ,             0x00},
		{0x2B,              0x00},
		{0x2C ,             0x05},//hsync delay 7:0 //low bit // 10
		{0x2D ,             0x00},//hsync delay 1:0 //high bit
		{0x2E ,             0x00},
		{0x2F  ,            0x00},
		{0x30  ,            0x02},//vsync delay 7:0  //2
		{0x31  ,            0x00},//vsync delay 1:0
		{0x32  ,            0x00},
		{0x33  ,            0x00},
		{0x34   ,           0x00},//hbp   //24
		{0x35  ,            0x00},
		{0x36  ,            0x00},//vbp
		{0x37  ,            0x00},
		{0x38  ,            0x02},//hfp
		{0x39  ,            0x00},
		{0x3A  ,            0x00},//vfp
		{0x3B  ,            0x00},
		{0x3C  ,            0x10},
		{0x3D   ,           0x00},
		{0x3E   ,           0x00},
		{0x0D , 		  0x01},
		{REGFLAG_DELAY,10},//delay 5ms
		{0x09 , 		  0x01},//soft reset
		{0xFF,0x00},//ended flag
	#else
		{0x09,              0x00},
		{0x0A ,             0x05},
		{0x0B ,             0x28},  
		{0x0D ,             0x00},
		{0x10  ,            0x26},
		{0x11  ,            0x00},
		{0x12 ,             0x59},//0x2b//0x2a//0x2c //0x35
		{0x13  ,            0x00},
		{0x18  ,            0x6c},
		{0x19  ,            0x00},
		{0x1A ,             0x03},
		{0x1B  ,            0x00},
		{0x20  ,            0x80},
		{0x21 ,             0x07},
		{0x22 ,             0x00},
		{0x23 ,             0x00},
		{0x24,              0x00},
		{0x25,              0x00},
		{0x26 ,             0x00},
		{0x27 ,             0x00},
		{0x28,              0x21},//21
		{0x29,              0x00},
		{0x2A ,             0x00},
		{0x2B,              0x00},
		{0x2C ,             0x0a},
		{0x2D ,             0x00},
		{0x2E ,             0x00},
		{0x2F  ,            0x00},
		{0x30  ,            0x02},
		{0x31  ,            0x00},
		{0x32  ,            0x00},
		{0x33  ,            0x00},
		{0x34   ,           0x18},
		{0x35  ,            0x00},
		{0x36  ,            0x00},
		{0x37  ,            0x00},
		{0x38  ,            0x00},
		{0x39  ,            0x00},
		{0x3A  ,            0x00},
		{0x3B  ,            0x00},
		{0x3C  ,            0x00},
		{0x3D   ,           0x00},
		{0x3E   ,           0x00},
		{0x0D , 		  0x01},
		{REGFLAG_DELAY,10},//delay 5ms
		{0x09 , 		  0x01},//soft reset
		{0xFF,0x00},//ended flag
		#endif
	#endif
#else
	{0x09, 0x00},
	{0x0A, 0x05},
	{0x0B, 0x10},
	{0x0D, 0x00},
	{0x10, 0x26},
	{0x11, 0x00},
	{0x12, 0x2c},
	{0x13, 0x00},
	{0x18, 0x78},
	{0x19, 0x00},
	{0x1A, 0x03},
	{0x1B, 0x00},
	{0x20, 0x20},
	{0x21, 0x03},
	{0x22, 0x00},
	{0x23, 0x00},
	{0x24, 0x00},
	{0x25, 0x00},   // 0x00
	{0x26, 0x00},
	{0x27, 0x00},
	{0x28, 0x21},
	{0x29, 0x00},
	{0x2A, 0x00},
	{0x2B, 0x00},
	{0x2C, 0x0a},
	{0x2D, 0x00},
	{0x2E, 0x00},
	{0x2F, 0x00},
	{0x30, 0x02},
	{0x31, 0x00},
	{0x32, 0x00},
	{0x33, 0x00},
	{0x34, 0x18},
	{0x35, 0x00},
	{0x36, 0x00},   // 0x00
	{0x37, 0x00},
	{0x38, 0x00},   // 0x00
	{0x39, 0x00},
	{0x3A, 0x00},   // 0x00
	{0x3B, 0x00},
	{0x3C, 0x00},   // 0x00
	{0x3D, 0x00},
	{0x3E, 0x00},
	{0x0D, 0x01},
	{REGFLAG_DELAY, 0x0a},
	{0x09, 0x01},
	{0xFF, 0x00},
#endif
#endif
};

static void push_table(sn65dsi8x_setting_table *table, unsigned int count)
{
	unsigned int i;

	for (i = 0; i < count; i++) {
		unsigned cmd;

		cmd = table[i].cmd;
		switch (cmd) {
			case REGFLAG_DELAY:
				MDELAY(table[i].data);
				break;

			case 0xFF:
				break;

			default:
#ifdef BUILD_LK
				sn65dsi83_write_byte(cmd, table[i].data);
#else
				sn65dsi83_write_byte(cmd, table[i].data);
#endif
		}
	}
}

#ifdef SN65DSI_DEBUG
static void dump_reg_table(sn65dsi8x_setting_table *table, unsigned int count)
{
	unsigned int i;
	unsigned char data;

	for (i = 0; i < count; i++) {
		unsigned cmd;

		cmd = table[i].cmd;
		switch (cmd) {
			case REGFLAG_DELAY:
				MDELAY(table[i].data);
				break;

			case 0xFF:
				break;

			default:
#ifdef BUILD_LK
				sn65dsi83_read_byte(cmd,&data);
				printf("dump cmd=0x%x  data=0x%x \n",cmd,data);
#else
				sn65dsi83_read_byte(cmd,&data);
				printk("dump cmd=0x%x  data=0x%x \n",cmd,data);
#endif
		}
	}
}
#endif
/*
int my_set_pwm(int pwm_num,int level)
{
	struct pwm_spec_config pwm_setting;
	memset(&pwm_setting,0,sizeof(struct pwm_spec_config));
	pwm_setting.pwm_no = pwm_num;
	pwm_setting.mode = PWM_MODE_OLD;
	//pwm_setting.pmic_pad = 0;
	pwm_setting.clk_div = CLK_DIV1;
	pwm_setting.clk_src = PWM_CLK_OLD_MODE_BLOCK;
	pwm_setting.pwm_mode.PWM_MODE_OLD_REGS.IDLE_VALUE = 0;
	pwm_setting.pwm_mode.PWM_MODE_OLD_REGS.GUARD_VALUE = 0;
	pwm_setting.pwm_mode.PWM_MODE_OLD_REGS.GDURATION = 0;
	pwm_setting.pwm_mode.PWM_MODE_OLD_REGS.WAVE_NUM = 0;
	pwm_setting.pwm_mode.PWM_MODE_OLD_REGS.DATA_WIDTH = 255; // 256 level
	pwm_setting.pwm_mode.PWM_MODE_OLD_REGS.THRESH = level;
	
	pwm_set_spec_config(&pwm_setting);
	return 0;
}
*/
void init_sn65dsi8x(void)
{
#ifdef SN65DSI_DEBUG
	unsigned char data;
#endif

	push_table(sn65dis83_init_table,
	           sizeof(sn65dis83_init_table) / sizeof(sn65dsi8x_setting_table));

#ifdef SN65DSI_DEBUG
	sn65dsi83_write_byte(0xe0,1);
	sn65dsi83_write_byte(0xe1,0xff);
	MDELAY(5);

	sn65dsi83_read_byte(0xe5, &data);
#ifdef BUILD_LK
	printf("dump cmd=0xe5  data=0x%x \n",data);
#else
	printk("dump cmd=0xe5  data=0x%x \n",data);
#endif
	dump_reg_table(sn65dis83_init_table,
	               sizeof(sn65dis83_init_table) / sizeof(sn65dsi8x_setting_table));
#endif


}

/* VDRAM 1.8v LDO enable */
static void ldo_1v8io_on(void)
{
	//mt6328_set_register_value(PMIC_RG_BUCK_VDRAM2_VOSEL, 3);
	//mt6328_set_register_value(PMIC_RG_BUCK_VDRAM2_EN, 1);
}

/* VDRAM 1.8v LDO disable */
static void ldo_1v8io_off(void)
{
	//mt6328_set_register_value(PMIC_RG_BUCK_VDRAM2_EN, 0);
}
/************************************************************************
*power fuction
*************************************************************************/
#ifdef BUILD_LK
void lvds_power_init(void)
{
	/*vgp1 1.8v*/
	//upmu_set_rg_vgp1_vosel(3); //vgp1 1.8v for SN65ds184 power
	//upmu_set_rg_vgp1_en(0x1);
	//pmic_set_register_value(PMIC_RG_VGP1_VOSEL, 3);//vgp1 1.8v for SN65ds184 power //make error
	//pmic_set_register_value(PMIC_RG_VGP1_EN, 1);
   //upmu_set_rg_vgp3_vosel(3);//3=1.8v, 0= 1.2v  //vgp3 1.8v for SN65ds184 power TC358775 power
   //upmu_set_rg_vgp3_en(1);//
	//pmic_set_register_value(PMIC_RG_VIBR_VOSEL,0x04);    
   	//pmic_set_register_value(PMIC_RG_LDO_VIBR_EN, 1);//vibr 1.8v for SN65ds184 power 	
	
	mt6392_upmu_set_rg_vgp1_vosel(3);
	mt6392_upmu_set_rg_vgp1_en(0x1);
}
#else //for kernel
void lvds_kernel_power_init(void)
{
	//hwPowerOn(MT6328_POWER_LDO_VGP1, VOL_1800, "LCM_DRV");
	printk("--- yuky lvds_kernel_power_init PowerOn vgp1 1.8v ---\n");
	// --- yuky change for 8163
	//hwPowerOn(MT6323_POWER_LDO_VGP3,VOL_1800,"LVDS");
	//printk("--- yuky lvds_kernel_power_init PowerOn vgp3 1.8v and vgp2 3.3v ---\n");
}
void lvds_kernel_power_deinit(void)
{	
	//hwPowerDown(MT6328_POWER_LDO_VGP1,"LCM_DRV");
	printk("--- yuky lvds_kernel_power_deinit PowerDown vgp1 1.8v ---\n");
	// --- yuky change for 8163
	//hwPowerDown(MT6323_POWER_LDO_VGP3,"LVDS");
	//printk("--- yuky lvds_kernel_power_deinit PowerDown vgp3 1.8v and vgp2 3.3v ---\n");
}

#endif
//
// ---------------------------------------------------------------------------
//  LCM Driver Implementations
// ---------------------------------------------------------------------------

static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
{
	memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
}


static void lcm_get_params(LCM_PARAMS *params)
{
	memset(params, 0, sizeof(LCM_PARAMS));

	params->type   = LCM_TYPE_DSI;

	params->width  = FRAME_WIDTH;
	params->height = FRAME_HEIGHT;

	params->dsi.mode   = SYNC_EVENT_VDO_MODE;

	/* DSI */
	/* Command mode setting */
	params->dsi.LANE_NUM                = LCM_FOUR_LANE;

	/* The following defined the fomat for data coming from LCD engine. */
#if defined(LVDS_PANEL_8BITS_SUPPORT)
	#ifdef SN65DSI83_SINGLE_LVDS_LK
		params->dsi.data_format.format      = LCM_DSI_FORMAT_RGB888; //LCM_DSI_FORMAT_RGB888;		
	#else
		params->dsi.data_format.format      = LCM_DSI_FORMAT_RGB888; //LCM_DSI_FORMAT_RGB888;		
	#endif
#else
	params->dsi.data_format.format      = LCM_DSI_FORMAT_RGB666;
#endif

	params->dsi.word_count=FRAME_WIDTH*3;
#ifdef SN65DSI83_SINGLE_LVDS_LK
		params->dsi.vertical_sync_active= 2; //5;//10;
		params->dsi.vertical_backporch= 2; //17;//12;
		params->dsi.vertical_frontporch= 4; //16;//9;
		params->dsi.vertical_active_line= FRAME_HEIGHT;//hight

		params->dsi.horizontal_sync_active				=10; //110;//100;  //
		params->dsi.horizontal_backporch				= 24; //100;//80; //
		params->dsi.horizontal_frontporch				= 30; //110;//100; //
		params->dsi.horizontal_active_pixel				= FRAME_WIDTH;//=wight
#else
		params->dsi.vertical_sync_active= 10; //5;//10;
		params->dsi.vertical_backporch= 20; //17;//12;
		params->dsi.vertical_frontporch= 20; //16;//9;
		params->dsi.vertical_active_line= FRAME_HEIGHT;//hight

		params->dsi.horizontal_sync_active				=30; //110;//100;  //
		params->dsi.horizontal_backporch				= 30; //100;//80; //
		params->dsi.horizontal_frontporch				= 30; //110;//100; //
		params->dsi.horizontal_active_pixel				= FRAME_WIDTH;//=wight
#endif
#if defined(LVDS_PANEL_8BITS_SUPPORT)
	#ifdef SN65DSI83_SINGLE_LVDS_LK
		params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888; //LCM_PACKED_PS_24BIT_RGB888;
	#else
		params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888; //LCM_PACKED_PS_24BIT_RGB888;
#endif	
#else
	params->dsi.PS=LCM_PACKED_PS_18BIT_RGB666;
#endif

	params->dsi.pll_select = 0; /* 0: MIPI_PLL; 1: LVDS_PLL */
#ifdef SN65DSI83_SINGLE_LVDS_LK
		params->dsi.PLL_CLOCK = 224;
#else
		params->dsi.PLL_CLOCK = 430;//448;//224; //218; //216; //214; //220; //267; //201; //LCM_DSI_6589_PLL_CLOCK_201_5;//this value must be in MTK suggested table 
#endif
	params->dsi.cont_clock  = 1;
}

static void lcm_set_gpio_output(unsigned int GPIO, unsigned int output)
{
	if (GPIO == 0xFFFFFFFF) {
#ifdef BUILD_LK
		printf("[LK/LCM] GPIO_LCD_PWR_EN =   0x%x\n",GPIO_LCD_PWR_EN);
		printf("[LK/LCM] GPIO_LCD_RST_EN =  0x%x \n",GPIO_LCD_RST_EN);
		printf("[LK/LCM] GPIO_LCD_BL_EN =   0x%x\n",GPIO_LCD_BL_EN);
#elif (defined BUILD_UBOOT) /* do nothing in uboot */
#else
#endif

		return;
	}

	mt_set_gpio_mode(GPIO, GPIO_MODE_00);
	mt_set_gpio_dir(GPIO, GPIO_DIR_OUT);
	mt_set_gpio_out(GPIO, (output>0)? GPIO_OUT_ONE: GPIO_OUT_ZERO);
}

static void lcm_init(void)
{
#ifdef BUILD_LK
	printf("[LK/LCM]lcm_init \n");
	/* pwr standby 5v */
	lcm_set_gpio_output(GPIO_STANDBY_PWR_EN, GPIO_OUT_ONE);
	MDELAY(10);
	/* extarnal AMP pwr eanble */
	lcm_set_gpio_output(GPIO_AMP_PWR_EN, GPIO_OUT_ZERO);
	/* extarnal AMP mute control */
	lcm_set_gpio_output(GPIO_AMP_MUTE_EN, GPIO_OUT_ONE);
	/* led enable*/
	lcm_set_gpio_output(GPIO_LED_BACKUP_EN, GPIO_OUT_ONE);
	
	/*VGP1 for Sn65dsi83 power*/
	lvds_power_init();
	
	lcm_set_gpio_output(GPIO_EDP_EN, GPIO_OUT_ONE); //EN EDP EN for vibr 1.8v 
	MDELAY(5);
	/*MT8193 enable clock*/
	lcm_set_gpio_output(GPIO_SRCLKENAI0_EN,GPIO_OUT_ONE);
	MDELAY(5);
	/* USB drvbus enable*/
	lcm_set_gpio_output(GPIO_USB_DRVBUS, GPIO_OUT_ONE);
	MDELAY(20);
	/* USB Hub RST*/
	lcm_set_gpio_output(GPIO_USBHUB_RST, GPIO_OUT_ONE);
	MDELAY(5);
	lcm_set_gpio_output(GPIO_USBHUB_RST, GPIO_OUT_ZERO);
	MDELAY(20);
	/* LCM RST */
	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ONE);
	MDELAY(5);
	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ZERO);
	MDELAY(20);
	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ONE);
	
	MDELAY(50);

	DSI_clk_HS_mode(DISP_MODULE_DSI0, NULL, 1);
	MDELAY(5);

	init_sn65dsi8x();
	MDELAY(10);

	/* lvds panel pwr enable */
	lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
	MDELAY(50);

	/* LCM Backlight enable*/
	lcm_set_gpio_output(GPIO_LCD_BL_EN, GPIO_OUT_ZERO);

#elif (defined BUILD_UBOOT)
#else
	printk("[Kernel/LCM]lcm_init \n");

	//DSI_clk_HS_mode(1);
#endif
}


static void lcm_suspend(void)
{
#ifdef BUILD_LK
	printf("[LK/LCM]lcm_suspend enter \n");

#else
	unsigned char temp;

	printk("[Kernel/LCM]lcm_suspend enter \n");
	/* Backlight pwr disable*/
	lcm_set_gpio_output(GPIO_LCD_BL_EN, GPIO_OUT_ONE);
	MDELAY(20);
	/* lvds panel pwr disable */
	lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ZERO);
	MDELAY(30);     /* avoid LCD resume transint */

	/* step 2 suspend sn65dsi8x */
	sn65dsi83_read_byte(0x0a, &temp);   /* for test wether ti lock the pll clok */
	printk("lcm_suspend  0x0a  value=0x%x \n",temp);

	sn65dsi83_read_byte(0x0d,&temp);
	printk("lcm_suspend  0x0d  value=0x%x \n",temp);

	sn65dsi83_write_byte(0x0d, (temp & 0xfe));  /* set bit0: 0 */

	/* step 3 set dsi LP mode */
	DSI_clk_HS_mode(DISP_MODULE_DSI0, NULL, 1);
#endif
}


static void lcm_resume(void)
{
#ifdef BUILD_LK
	printf("[LK/LCM]lcm_resume enter\n");

#else
#ifdef SN65DSI_DEBUG
	unsigned char temp;
#endif

	printk("[Kernel/LCM]lcm_resume enter \n");

	//DSI_clk_HS_mode(1);
	//DSI_clk_HS_mode(0, NULL, 1);
	DSI_clk_HS_mode(DISP_MODULE_DSI0, NULL, 1);
	MDELAY(50);

	/* step 1 resume sn65dsi8x */
	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ONE);
	MDELAY(5);
	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ZERO);
	MDELAY(5);
	lcm_set_gpio_output(GPIO_LCD_RST_EN, GPIO_OUT_ONE);
	MDELAY(10);

	init_sn65dsi8x();
	MDELAY(10);

#ifdef SN65DSI_DEBUG
	sn65dsi83_read_byte(0x0a,&temp);
	printk("lcm_resume cmd-- 0x0a=0x%x \n",temp);

	sn65dsi83_read_byte(0x0d,&temp);
	printk("lcm_resume cmd-- 0x0d=0x%x \n",temp);

	sn65dsi83_read_byte(0x09,&temp);
	printk("lcm_resume cmd-- 0x09=0x%x \n",temp);
#endif

	/* step 2 resume lvds */
	lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE);
	MDELAY(10);	
	/* step 3 resume Bakclight */
	lcm_set_gpio_output(GPIO_LCD_BL_EN, GPIO_OUT_ZERO);
#endif
}

static unsigned int lcm_compare_id(void)
{
#if defined(BUILD_LK)
	printf("Sn65dsi83 lcm_compare_id enter \n");
#endif

	return 1;
}

LCM_DRIVER cpt_clap070wp03xg_sn65dsi83_lcm_drv = {
	.name           = "cpt_clap070wp03xg_sn65dsi83",
	.set_util_funcs = lcm_set_util_funcs,
	.get_params     = lcm_get_params,
	.init           = lcm_init,
	.suspend        = lcm_suspend,
	.resume         = lcm_resume,
	.compare_id     = lcm_compare_id,
};

Thanks.

over 5 years ago

0 Ikechukwu Anyiam over 5 years ago

TI__Mastermind 35130 points

Hi Jacky,

0xE5 reading 0x01 means the PLL is unlocked. Are you enabling the PLL in register 0x0D correctly in the initialization sequence?

Please also provide the following:

1. The .dsi output file from the DSI-Tuner after entering the settings (press ctrl-e in the tool)

2. A register dump of the DSI84

Regards,

I.K.

Interface

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SN65DSI84: Questions for SN65DSI84 no video output issue