SN65LVPE501: Why does not this SN65LVPE501 connect PCIe reference clock between host and device?

Zunbae Moon1

Part Number: SN65LVPE501

Dear All,

I am a beginner about PCIe and am now studying its specifications.

I have a question.

This chip(SN65LVPE501) connects Tx and Rx differential pair between HOST and DEVICE. By the way, why does not it connect PCIe reference clock between HOST and DEVICE?

Could you let me know it?

Thanks, Zunbae

over 4 years ago

0 Brian Zhou over 4 years ago

TI__Guru** 111740 points

PCIe communication is between TX and RX, not PCIe clk.

0 Lee Sledjeski over 4 years ago

TI__Mastermind 43795 points

Hi Zunbae,

The clock is much lower speed, so it is not impacted by attenuation to the same extent as the high speed data lines which can be switching at speeds up to 16 Gbps in the current PCIe specification.

Regards,

Lee

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SN65LVPE501: Why does not this SN65LVPE501 connect PCIe reference clock between host and device?