TUSB8041: Abnormal chip startup

Hi Zhang,

Could you provide a waveform with 3.3V, 1.1V, and GRSTz for the "1.1V is powered on first and then 3.3V is powered on first" case? I would like to confirm that VDD and VDD33 are stable before de-assertion of GRSTz for at least 3ms. 

The above figure shows the timing sequence of 3.3V and 1.1V power-on, in which blue is 3.3V and yellow is 1.1V

The figure above shows the charging timing of 3.3V and GRSTz pins, of which 3.3V is blue and GRSTz pins are yellow

The figure above shows the charging timing of 1.1V and GRSTz pins, in which blue is GRSTz pins and yellow is 1.1V

I have been debugging these days without any progress. Could you please check the timing of these power on?

Hi,

Can you try populating R83 and removing R87? It seems your device is in SMBUSz mode and not I2C. SMBUSz mode will leave chip non-functional until it is programmed by SMBUS correctly. I2C mode will give you regular operation without the need to program.   

Hi

I have removed the R87 resistance, but I still cannot identify the R83 resistance by welding it. But after power on, I ground the TUSB8041 chip's 50 pins, connected it to 2-3S and disconnected it. Then the chip can recognize the TUSB8041 chip and the mounted USB device. Please help to determine whether there is a problem with the power sequence above.

Hi Hao,

I recommend keeping TUSB8041 in I2C mode when debugging and removing any EEPROM.

For passive reset your 1.1V should be stable before your 3.3V rail. This prevents the TUSB8041 from exits reset before 1.1V core voltage is stable. 

Hi Mailk

1) During debugging, 39 pins of TUSB8041 chip have been pulled up and debugged into I2C mode.

2) In the debugging process, I tried to stabilize 1.1V first and then 3.3V, but still failed to identify the successful device