TPS65987D: How to configure and control from HOST CPU via I2C?

Hello,

Find answers to your questions below.

1. I’m wondering the difference among two methods above (A) and (B). Is the PTC setting mandatory or just highly recommended for avoiding the lack of necessary setting?

• It is mandatory that you load a patch onto the PD controller before you start adjusting the register settings. Yes, loading the flash image changes some of the register values, but it also loads firmware onto the device that is needed to run as expected. Even if you have the ability to change the register values on your own using an external processor, you must also load the patch onto the PD controller first

2. The operations from host currently is just setting several registers 0x27, 0x28 and 0x29. Is it enough for enabling port? If not, please let me know how to operates to switch port from disable to enable.

• The port will remain disabled until a valid flash image is loaded to the device using an external flash. Similar to my comment for #1, you must load a valid flash image onto the PD controller first before you can begin adjusting register values

3. If you have any sample code for HOST CPU, please provide us.

• Section 8.3.12 of the datasheet outlines how to interact with the PD controller from an external processor via I2C. There are code examples within some of the different app notes for the TPS65987D depending on what you are wanting to accomplish. However, there is not a single repository that stores all of this code for reference. You will also mainly reference the TPS65987D Host Interface and Technical Reference Manual for register definitions. https://www.ti.com/lit/pdf/slvubh2 

Hello Mr.McGaffin,

I understood loading firmware is necessary for runnnig PD.

Let me confirm two things;

1.
I had recognized that TPS65987 can automaticcally run without any patch (neither loading from host nor external EEPROM) depending on the external register (R1 and R2) setting on ADCIN1. Is my understanding correct? or, even if we set configuration 1 by these external registance divider setting, we need to do load firmware into TPS65987?

2.

Let me clarify the way to create & load patch;

(1)Crate patch image using GUI tool (LOW image enough?)
(2)Downlod created patch image into TPS65987 after injection on 3.3V power.
(3)For download, we need to make use of PTC 4CC commnand.

Is above understanding correct?

Do you have sample code for downloading patch from HOST using PTC command? It will help us.

Best regards,

Yoshizaki

DRP.zip[1]Progress
We changed the resistor value regarding ADCIN1(R1,R2) for  BP_ECWait_Internal.And we can verify MODE is PTCH when start-up.

MODE=PTCH(Start-up)
MODE=APP(Patch Download Completed)

But the status of PTCq output data(byte13)
is still 0x08(Application Configuration Patch Error)

(*)BEFORE ADCIN1 modification
[I][USB]MODE = APP
[I][USB]BootFlags(0x2D)
[DUMP][RCV]30 03 00 00 a2 06 00 00 30 00 00 00
[I][USB]IntEvent1(0x14)
[DUMP][RCV]00 00 00 00 00 00 00 00 00 00 02
[I][USB]ReadyForPatch 1
[I][USB]MODE = APP
[I][USB]READ PTCs
[DUMP][RCV]00 00 00 00
[I][USB]WRITE PTCs
[DUMP][SND]03
[I][USB]READ PTCs
[DUMP][RCV]00 00 00 00
[I][USB]MODE = APP
[I][USB]PTCd Send 11584 Byte
[I][EXC]extcharger_check
[I][USB]MODE = APP
[I][USB]READ PTCc
[DUMP][RCV]00 00 00 00
[I][USB]Patch Download Complete
[I][USB]MODE = APP
[I][USB]READ PTCq
[DUMP][RCV]00 00 0a 00 40 2d c0 24 40 02 03 03 08 03
                                               ^^<-Application Configuration Patch Error
====================================================

[I][USB]MODE = APP
[I][USB]WRITE PTCr
[DUMP][SND]03 00 be ef
[I][USB]READ PTCq
[DUMP][RCV]88 00 00 00 00 00 00 00 00 00 03 03 00 00
[I][USB]MODE = APP
[I][USB]usb_pd_i2c_patch END

(*)AFTER ADCIN1 modification
[I][USB]MODE = PTCH
[I][USB]BootFlags(0x2D)
[DUMP][RCV]30 03 00 00 a2 06 00 00 30 00 00 00
[I][USB]IntEvent1(0x14)
[DUMP][RCV]00 00 00 00 00 00 00 00 00 00 00
[E][USB] ReadyForPatch not 1
[I][USB]MODE = PTCH
[I][USB]READ PTCs
[DUMP][RCV]00 00 00 00
[I][USB]WRITE PTCs
[DUMP][SND]03
[I][USB]READ PTCs
[DUMP][RCV]00 00 00 00
[I][USB]MODE = PTCH
[I][USB]PTCd Send 11584 Byte
[I][USB]MODE = PTCH
[I][USB]READ PTCc
[DUMP][RCV]00 00 00 00
[I][USB]Patch Download Complete
[I][USB]MODE = APP
[I][USB]READ PTCq
[DUMP][RCV]00 00 0a 00 40 2d c0 24 40 02 03 03 08 03
                                               ^^<-Application Configuration Patch Error still remain.
====================================================

[I][USB]MODE = APP
[I][USB]WRITE PTCr
[DUMP][SND]03 00 be ef
[I][USB]READ PTCq
[DUMP][RCV]88 00 00 00 00 00 00 00 00 00 03 03 00 00
[I][USB]MODE = APP
[I][USB]usb_pd_i2c_patch END

[2]Further investigations
For ignoring Application Configuration Patch related error, we tried to eliminate AppConfig itself by modifing INPUT data for PTCs command from 0x03 to 0x02 as well as modifying PTCr command INPUT data from 0x03 0x00 0xBE 0xEF to 0x02 0x00 0xBE 0x00.
Then, we could eventually see CC1/CC2 waveform begin to work. (it means something getting better..)
 
However VBUS output is 0V,this means main issue still remains.
 
We consider PATCH data effectively reflected and firmware is working baecuse we could see CC1/CC2 waveform changed when we applied different configurations as follows;
(1)Upstream Facing Port(UFP)Only
(2)Downstream Facing Port(DFP)Only
(3)Dual Role Port(DRP),prefers power source
 
However, we couldn't see any VBUS output from PD controler yet.
Please let us know what is the reason and how we can successfully output 5V to VBUS. Is there any miss configuration? or still need to resolve Application Configuration Patch Error issue regarding PTC?
 
We need your advice to figure out correct implementation.

I attached PRJfile (DRP configuration) for your review.

Best regards,

Yagi

Hello,

I've submitted a friend request with you here on the forums. Please accept this request and I can share with you the app note that walks through how to use the PTCx commands

Hello Adam-san:

I accept your friend request.
I have received "SPI_Less_EC_Based_Host_Programming_Over_I2C_slva972a.pdf" to communicate TPS65987D,
but we have not suceeded yet.

Regards,

Yagi