Dear Technical Support Team,
Q1)
According to the App Note(SNLA323),
the procedure is describe for writing 0x04 to register 0x00 and returning the register status to the default before setting the equalizer / retimer of Channel resister.
What is the state of this IC when the equalizer / retimer is set without writing 0x04 to 0x00?
Will it be in a state where we cannot guarantee even if it behaves unexpectedly?
Q2)
When setting the equalizer / retimer, is it desirable to perform the setting while a valid signal is being received by the RX?
If the equalizer / retimer is set without receiving a valid signal, will it be impossible to guarantee even if the operation is unexpected?
Best Regards,
ttd