Hi Team,
When a processor sends video data over DSI to the 941AS, it looks like there is the possibility of a CRC check in register DSI_ERR_RPT_0 (0x2B[2]). Would this catch an issue if the data leaves the processor and is corrupted on the way to the 941AS? Is that standard for DSI protocol or does the processor need to enable/add the CRC to make this work?
Thank you,
Jared
