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DS90UH927Q-Q1: DS90UH927Q-Q1 timming

Part Number: DS90UH927Q-Q1

Hi team,

Customer used UH927 pared with UB926, using internal clk internal timming pattern generation. and found that:

1. pattern is generated by UH927 with timming A, there is no display in the panel;

2. pattern is generated by UB926 with the same timming A, there is normal display;

3. pattern is generated by UH927 with timing B, there is normal display.

4. pattern is generated by UB926 with timming B, there is normal display.

For timming A,  Hsync=Vsync=1, HBP=79, VBP=19, HFP=80, VFP=4

For timming B, Hsync=32, Vsync=10, HBP=80, VBP=6, HFP=48, VFP=3

The issue in case#1 may be caused by invalid timming, but with the same timming in case#2, it can work. My question is whether UH927 would change the timming slightly in operation?

thanks!

  • Hi,

    What is the timing that the display wants?

    I suspect that the 927's pattern generator is generating a PCLK that is too fast or too slow for the display without a external clock source. Can you retry #1 but this time with an external clock as the clock source so that the timing is more accurate. 

    "The internal timing generation may also be driven by an external clock. By default, external timing mode is enabled. Internal timing or Internal timing with External Clock are enabled by the control registers" 

    Set bit 3 in register 0x65 to 1.

    Regards,

    Michael W.

  • Hi Michael,

    thanks for your reply. I will get back to you once I get the timming data and external clk testing results.

    In the other hand, my further question is, if the issue is cause by inaccurate internal clock, why in case#3 also with internal clock but change the timming can also work normally?

    thanks!

  • Hi,

    I do not know, what is the panels timing requirements? Timing B might be closer to what the panel wants.

    Regards,

    Michael W.