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I am looking for advice on clock distribution for an Oil and Gas well-monitoring application. The tool is likely to be 2m in length and I have to distribute a 25MHz clock to up to 10 daughter boards along that length. Some daughter boards contain up to 24 devices that need the clock. No hot-plugging will occur.
My current thinking is to transmit the clock using multidrop and have built a module containing a SN65MLVD200A as a driver module. I picked this M-LVDS part as I have a relatively slow clock; I have read TI documents that state LVDS is both good for multidrop (SLLD009 bottom of page 6-6) and not good (SNLA113B bottom of page 3).
I planned to put receivers on the main board to make the stub lengths as short as possible but then I need to get the signal onto the daughter cards and distributed thereon.
My questions begin therefore:
1) Is M-LVDS the best option for the main clock distribution?
2) How best to transfer that clock onto a daughter board that might have many clock loads? I cannot find M-LVDS repeaters, only a 1:4 fanout device. Can I use an LVDS repeater?
3) There is a much wider choice of LVDS single/dual receivers in small (SOT) packages than M-LVDS (packages without legs are not really option). Is it common to use LVDS receivers with M-LVDS drivers?
I have read many TI application notes now and I'm going round and round. I need someone with more experience to make some suggestions, on parts, topology, anything; all comments are welcome.
I would look at the DS92CK16 which is a 'BLVDS' clock buffer. BLVDS is a technology developed by National Semiconductor before the MLVDS standard was released, which is quite similar (B is for Bus, M is for Multipoint).
The DS92CK16 is a 1:6 clock buffer chip that was intended to receive a clock signal from a backplane and to provide 6 local copies for use on the card. The output clocks on the 'CK16 are single ended. - are the clock devices on your individual boards LVDS inputs, or are they LVCMOS, or what?
If your sinks for clocks are differential or LVDS, a few parts to look at would be the DS10BR254, which is a 1:4 fanout buffer, or the SN65LVDS108 (1:8) or the SN65LVDS116 (1:16).
In any case, you will want to keep your stub lengths as short as possible, and with a slow clock like 25MHz, you may want to intentionally slow down the edges to keep from having reflections at the points where you tap off of your primary line to each card.
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In reply to Mark Sauerwald88474:
I have a mixture of cards. The simplest has only 1 device that requires a single ended clock input.
The most complex has 16 devices that require an LVDS clock and 8 devices that require a single ended clock. This board is very long and thin and all the devices are in line, so I thought it was ideally suited to a local multidrop bus. I was looking for small single/dual receivers to supply the 8 single ended devices in the chain. If I use a fanout part then I will have lots more tracks to route and the layout is already quite busy.
I will have a look at BLVDS and the devices you mentioned.
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