Other Parts Discussed in Thread: LMR10515
I am using a DP159 in retimer mode and X-Mode with a Xilinx Kintex FPGA.
DP159 data sheet does not specify max Vdd power supply ripple.
Currently using a LMR10515 at 1.09V
For the most part the design has been working, however, we are finding that with AMD GPU we get more bit errors and are examining all possible sources of problems. The Vdd ripple came up and I would like to know what TI recommends the max power supply ripple be for proper operation of the DP159 as operating here.
Also seeing issue when using X-Mode recovered clock as the source clock for re-transmission. When using a PLL as a standalone TX in the FPGA we are working well, however, when using the X-Mode recovered clock from the DP159 as the TX clock, the FPGA downstream sink reports bit errors.
