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TUSB4041I: CFG_ACTIVE bit

Kuramochi Tadahiko
Guru 28715 points
Part Number: TUSB4041I

Hi,

Below is mentioned on the datasheet;

"The TUSB4041I device waits indefinitely for configuration by the SMBus host and does not connect on the upstream port until the SMBus host indicates configuration is complete by clearing the CFG ACTIVE bit".

"The bit is cleared by a writing 1."

I'm understanding that CFG ACTIVE bit should be written 1 to complete configuration.

On the other hand, there is below mention on the datasheet.

"TUSB4041I device does not connect on the upstream port while this bit is 1."

So I worry that the upsteram port is not connected by clearing the CFG ACTIVE bit.

Do I misunderstand?

Best Regards,

Kuramochi

  • 0
    TI__Guru 60865 points
    Hi Kuramochi-san,

    While cfgactive = 1, the hub will not connect its upstream port. To clear the cfgactive bit, the SMBUS host must write a "1", writing a "1" to cfgactive while it is equal to 1, will clear the bit.

    Regards,
    JMMN
  • 0 in reply to JMMN
    Guru 28715 points

    JMMN-san,

    Thank you for your information.

    I have 3 additional questions.

    >writing a "1" to cfgactive while it is equal to 1, will clear the bit.

    Does cfgactive value change to 0 or keep 1 after "clear"?

    What does "W1C" mean?

    In the case of also EEPROM, cfgActive must be read 1 to clear the bit from EEPROM.

    Is it correct?

    If yes, is "EEPROM CONFIGURABLE=No" on the table 3 typo?

    Best Regards,

    Kuramochi

  • 0 in reply to Kuramochi Tadahiko
    TI__Guru 60865 points
    Hi,

    CFGACTIVE should be cleared after a write of "1" is sent to it when it is already set to "1".
    W1C means "write one to clear"
    CFGACTIVE bit is not applicable in EEPROM mode, only SMBUS mode. Register F8h is not used in EEPROM mode.

    Regards,
    JMMN