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DS110DF111: SGMII signal sometimes can not be locked by default

Lin Lu
Prodigy 120 points
Part Number: DS110DF111

Hello,

I use DS110DF111 in one design. The Signal is SGMII, And I loopback Pin 24/23 (INA) with Pin 20/19 (OUTB) using a loopback board to test the Retimer. I measure the input signal on Pin 11/12 (INB) and output signal on Pin 7/8 (OUTA). The Signal on OUTA should be the same like the Signal at INB with time delay. I don't config the Retimer with I2C Bus and just use the default settings.

sometime I got signal on OUTA very quickly, sometime it takes very long time to get a signal on OUTA, sometime I can not get signal on OUTA at all. Does it mean, the input signal is not locked by the retimer? And I would like to ask, which reasons can it be and at which registers should I check (I can acess the register of retimer using I2C Bus).

 Best Regards,

Lin

  • 0
    TI__Mastermind 19225 points

    Based on your description I would speculate about the variation in results being potentially related to variation in the retimer EQ auto adaption result. The EQ auto adaption may be less consistent for cases where the retimer input channel is very short/low insertion loss; I believe this might be your case. One thing to try is to set the retimer to adapt mode 0 (i.e. no adaption) and force CTLE = 0x00, the lowest CTLE boost setting. See the retimer channel register write routine below:

    REG

    Value

    Comment

    0x31

    0x00

    Set Adapt mode 0

    0x2D

    0x88

    Enable EQ override

    0x03

    0x00

    Set EQ = 00

    0x3A

    0x00

    Set EQ = 00

    0x0A

    0x1C

    Puts the CDR into RESET

    0x0A

    0x10

    Releases the CDR from reset

    In terms of monitoring the real time status of the retimer, the following registers are of interest. refer to the DS110DF111 full datasheet for details 

    • Channel register 0x02 - Retimer status register.
    • Channel register 0x52 - contains adapted CTLE boost value when operating in an auto adapted mode (i.e. adapt mode 1, 2 or 3)
    • Channel registers 0x27 and 0x28 - Contain the retimer horizontal and vertical input eye opening values

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer