In the document slyy147, the following is mentioned:
"you can use Equation 1 to estimate how much capacitance will keep the system voltage valid if 20V falls to 5V with a ~3A initial load within 10ms. My design ended up using six 100µF capacitors to keep the system power rail alive.
Queries:
1. As per our application, the nominal bus voltage is 5V. The minimum voltage required for the switcher operation is around 4.4V. So, it is understood that we need some really bulk amount of capacitance.
In the document, the capacitance is calculated to supply load for 10ms. How is this value calculated? Is this the time taken to successfully achieve a fast role swap? The datasheet mentions a FRS duration of 150us.
2. Having these bulk capacitors will eventually draw high amounts of inrush currents on power up. Does TPS65888 has provisions to limit this?
From the document slyy147, the following FRS PD sequence - figure 4
Queries:
1. When exactly during this sequence does the new source apply power to the bus after FRS?
2. If it follows the complete sequence as shown above, the time taken looks to be around 125ms (calculated from timestamp). It is not practically possible to have the system powered for such a long duration using bulk caps. How shall this be handled?
In addition to the above queries, we would like to confirm the following:
1. Can event triggers be mapped internally across ports instead of using GPIO based events?
2. Can an FRS event be triggered internally within the PD based on other events or does it require processor intervention?
