Hi all,
Can you tell me there must be wait time after the sequence below (9.1.2 Power-Up Requirements and PDB Pin in the datasheet) until re-PLL? Is 24ms sufficient for 913A-914A after writing the register of 0x27=0x00?
If timing constraint t3 can not be assured, the following programming steps should be issued to the 913A via local I2C control (not via remote back channel) >= 10ms after the power sequence is complete. This step will cause a brief restart of the forward channel output:
• Write Register 0x27 = 0x20
• Wait >= 20ms
• Write Register 0x27 = 0x00
Regards,
RYO