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DP83822I: PHY Initialization fails sporadically (room temperature)

Part Number: DP83822I
Other Parts Discussed in Thread: AM4372

My customer experience a problem where the PHY does not / does not properly initialize during Bootup. This happens at 2 out of 10 boards at room temperature.

Good case:

The PCB is connected with a switch, the PCB is being started. The Link LED and the Speed LED are getting ON. The Link LED blinks and indicates data traffic..

 Bad case 1:

The PCB is connected with a switch, the PCB is being started. Both the Link LED and the Speed LED remain OFF. There is no connection established.

 Bad case 2

The PCB is connected with a switch, the PCB is being started. The Link LED blinks very fast and the Speed LED remains OFF. There is no connection established. 

 My customer experienced PHY initialization problems at very low temperature. This problem could be resolved by re-initializing the PHY through SW during Uboot of the AM4372 controller. 

Can you please advise what the root cause and potential fix might be. 

Thanks

Josef

  • Hi Josef,

    So the same board sometimes have link-up issues on some boot-ups and for most of the bootups it works fine?

    Can you please help me with the register values of good and bad case : 

    1. Registers : 00 till 1F

    2. Registers : 0x0467 and 0x0468.

    Also you may try enabling robust auto-mdix : reg<0x0009>[5]

    --

    Regards,

    Vikram

  • Hi Josef & Vikram,

    what we figured out is, that the PHY will initalize in the Fiber Mode and therfore we can´t get a link in the 100BTX network.

    We did not change the stappings and use the default values from the Phy. Means we do not use external stapping R´s at all.

    The Phy is directly connected to the AM437x MII Interface.

    What we found when we read the PHY registers that the FX_EN Bit ist set to 1, but should be 0 because of default strapping (mode 4).

    right colum is the bad value, left colum is correct value

    Register Name

    Korrekter Wert

    Fehlerhafter Wert

    Control Register #2 (CR2)

    0x0100

    0x4100

    Auto-Negotiation Advertisement Register (ANR)

    0x01E1

    0x0181

    When we do a RESET to the PHY in the PHY-RCH Register to a new init, it is the same and did noch change to the default (100BTX) mode. Still in FX mode.


    When we set the 100BTX Mode manually and make a RESET in the PHY-BMCR we keep the setting we did before.

    It turns out, that the COL signal (pin 29) which determins the Strapping for FX Mode gets a wrong signal.

    The HW Reset of the PHY is controlled by the uC´s System-Reset output.

    This is monitored in very cold environment (near -40°) almost ever at each new PWR On start. On a few boards even sometimes in room temp environment.

    BR

    Dieter

  • Hello Dieter,

    Good to know that reading the strap register helped you debug the issue. I am closing this thread. Do get in touch if you need further help. 

    --

    Regards,

    Vikram