This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ISO6740: ESD test condition

Part Number: ISO6740
Other Parts Discussed in Thread: STRIKE

Hi team,

Could you help me to clarify the ESD specification of ISO6740?

I'd like to clarify the bias condition of each pins under the HBM and CDM tests.

In HBM and CDM, it is described as "all pins".

When the ESD strike is applied to the target pin, how the other pins are biased? Are they grounded?

Could you suggst related app note to help my undarstanding of the ESD test?

Best regards,

Itoh

  • Hello Itoh-san,

    Thank you for your question. Please allow me to check with the team and get back to you tomorrow. 

    Best,
    Andrew

  • Hello Itoh-san,

    Thank you for your question. After looking into it our understanding is that HBM pulses are applied to various combinations of pins with the other side being grounded, and the pins not under test are left floating. 

    When testing CDM, each pin has a CDM pulse applied one at a time and the remaining pins are left floating. 

    For more information, please refer to the following specifications:

     - (HBM) as per ANSI/ ESDA/JEDEC JS-001

     - (CDM) as per JEDEC specification JESD22-C101

    For more information on general ESD topics, please see app note on Electrostatic Discharge (ESD) (Rev. A).

    I hope this helps.

    Best,
    Andrew