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[TPS57160-Q1]For low Vin operation

Other Parts Discussed in Thread: TPS57160-Q1, TPS54240, TPS54260

Hi

 

I am considering using the TPS57160-Q1.

Vout is 5.625V ,switching frequency is 400kHz and inductor ripple current is 100mVpeak.

Usually it is used in Vin12V, but that worst case Vin is 6V.

In this case the duty is 93%.

When actually board operating under these conditions, at some of the board it seems that the output voltage is oscillating.

Perhaps it is working PH-BOOT UVLO.

Because switching frequency is very slow and It is in normal operation when Vin becomes gradually up to 8V.

I must consider it as a little more take a potential difference of Vin and Vout.

But then comp voltage is around 2V and SS voltage is 300mV to 200mV.

I'm thinking oscillation of output is due to the potential difference of PH-BOOT, but I have become worried that there is no cause something else to look at the COMP and SS voltage.

The operation of the COMP and SS voltage or will those that are assumed?

If it is how much of Duty, Will it be considered that there is sufficient margin?

 

Thanks.

  • The appropriate Applications Engineer has been assigned to respond accordingly. Thank you for your patience.
  • Hi
    Oscillation of TPS57160 of The title is still, it seems to be due to the PH-BOOT UVLO.
    Set the Vstart to 6.5V it did not oscillate when I experiment.
    However, the required specifications are strictly, Vin is more than 6.5V, Vout can not be set to 5.625V below.
    Potential difference between Vin and Vout, the margin to ensure not to apply small PH-BOOT UVLO is I think not enough.
    Somehow in this device, and we want to ensure not to apply UVLO.
    In such thing and ripple current to use a low ESR parts of reselect the larger as inductors, I think there is no way to avoid the certainty?
    As long as it difficult, please tell me the reason.ThanksTomoaki Yoshida
  • Hello Tomoaki,

    What I think you are facing is low dropout operation, which is caused by a low voltage drop between PH and Boot. on page 12 - 13 in the datasheet can you find a more detailed description together with those two graphs, illustrating when the device turns in to low drop out mode over different load current. The graphs indicates that light load operation results in a higher drop out voltage.  

       

    To avoid this you can either add a dummy load to increase the output current or add a charge pump to the boot. I have linked in two application notes on the same topic.

    Methods to Improve Low Dropout Operation With the TPS54240 and TPS54260

    Providing Continuous Gate Drive Using a Charge Pump

    Regards,
    Karl

  • Hi Karl,

     

    Thank you for your reply.

    I'm considering the figure 10. Diode tied from input to BOOT in Methods to Improve Low Dropout Operation With the TPS54240 and TPS54260, which was taught to you.

    So, I want to check in advance, how influence are there by inserting this Diode?

    I want to know what can be a trade-off and the effection.

     

    Regards,

    Tomoaki Yoshida

  • Hello Tomoaki,

    Adding those diodes will result in a system with lower efficiency and a bigger PCB solution. What you get out from this is a better performance during low Vin and light load.

    Is that the answer for your question?

    Please also make sure that the device is operation in "low dropout operation" by comparing the behavior of the device with the description in the datasheet.

    Regards,
    Karl
  • Hello Karl,

     

    Thank you for your reply.

    It is good information for me, thank you.

    I am verifing the external voltage at BOOT like a Figure10 in Application report SLVA547A  page 8 that was taught to you to verify the actual board.

    But not far effect can be confirmed.

    I have a three questions about External voltage at BOOT.

    In the application report , it has been marked result when EN pin is disable.

     

    question 1.

    Is this would be that EN are recommended to disable?

    If, in the case of employing the External voltage BOOT, please tell me a reason it is recommended that EN pin is disable.

     

    question 2.

    Output voltage in our system will be 5.625V.

    So, I want to know the resule Figure 9 on page7 in application report SLVA547A when the output voltage is 5.625V.

    Are there result very close values of 5.5V?

     

    We are're experimenting, but it is not going well at the moment.

    If there is advice, please various teaching.

     

    Regards,

    Tomoaki Yoshida

     

  • Hello Tomoaki,

    Answer 1:
    The enable pin has an internal pull-up, so by leaving it floating will still enable the device. The reason for removing them is to avoid the device for shutting off, duo to a voltage drop at the pin (Below 1.2 V according to the datasheet).

    Answer 2:
    Yes, you can expect a similar relationship between Vin and external voltage.

    Best regards,
    Karl
  • Hello Kerl,Thank you for your reply.I understand your advice.
    I am trying some methods in methods to Improve Low Dropout Operation With the TPS54240 and TPS54260 that you told me.
    Improvement was seen in the 50mA current of about where it was using a dummy resistance.
    In the conditon following as
    Vstart is 6V, Vout is 5.625V and switching frequency is 400kHz.
    Thus in start up, the gap between Vin and Vout is 0.375V.
    At Vin is 5.4V in the application report Figure 7, the dummy current is 12mA.
    Voltage of Vout is different, but the gap is nearly the same conditions at 0.4V.
    It feels like the gap of my results and the application report is large, but please tell us your opinion.
    If there is a parameters of factor generating this gap, please tell me.
    I'm thinking as this factor, ripple current in the inductor or switching frequency.
    Best regards,Tomoaki Yoshida
  • Hellow Kerl,

     

    After the previous writing, it is necessary to review the system specification, we must make the output voltage to 6V.

    When considering the deviation of ENBLE, Vstart voltage will as typicaly 5.9V.

    When Vin is 5.9V, the output is not may be a 5.9V or less, but it should not be working UVLO of PH-BOOT.

    Originally for UVLO of PH-BOOT, we designed the circuit added the method of Diode tied from output to BOOT and dummy resistance.

    In the case of Vin is below the target Vout, is this way effective?

    We must rethink the early measures as possible if if is there no effect.

    If there is an effect, I want to know is 6V output version of Figure 9. of Application report SLVA547A .

     

    Best regards,

    Tomoaki Yoshida