Hi, Experts
I noticed that the TMS470R1B1M Silicon Errata <SPNZ139> says, ZPLL Must Operate in Multiply By Eight Mode. My questions are:
- Is this errata also applied to SM470R1B1M? We are using SM470R1B1M.
- Our OSC clock is 10MHz, then 10*8=80MHz. Is the 80MHz after the ZPLL multiplier a qualified value (note: our core clock is 80/2 = 40MHz)? I remember that, the document says, the max core clock of SM470R1B1M is 60MHZ
Regards!
Wen