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SN74LVC1G04: About Input Frequency Range

Part Number: SN74LVC1G04
Other Parts Discussed in Thread: SN74AUC1G04

Hello Expert,

My case is locked.

https://e2e.ti.com/support/logic-group/logic/f/logic-forum/999056/inquiry-about-single-inverter-gate/3691150

So I create new thread.

I want to get your confirm about below my question.

I found application note like below.

How to Select Little Logic (Rev. A) (ti.com)

SN74LVC1G is max. 200MHz (@ 5V) and SN74AUC1G is max. 275MHz (@2.5V) on the document.

Below is your previous reply.

This depends on the supply voltage. 200 Mbps is supported by the SN74LVC1G04 at 5 V and by the SN74AUC1G04 at 1.2 V … 2.5 V.

200 MHz (= 400 Mbps) is not supported at all.

What is right data?

Could you please send true data?

Best Regards,

Michael

  • I derived my answer from that application note.

    Fmax is the maximum input frequency of a flip-flop. However, the speed is limited by the drive strength of the output, and for a flip-flop, the output switches at half the input frequency.

  • Hi Clemens,

    Thanks for your quick and kind reply.

    About inverter,

    As you already mentioned, do we have to use max. 100MHz both SN74LVC1G04 at 5V and SN74AUC1G04 at 1.2V … 2.5V?

    There is no product able to support by 200MHz.

    BR,

    Michael

  • My statement above ("the speed is limited by the drive strength of the output") appears to not be true for the AUC family; the propagation delay is much smaller than Fmax would indicate.

    With a Tpd of 2 ns, AUC allows at least 500 Mbps = 250 MHz.

  • Hi Clemens,

    I have a another questions.

    Could you please reply about each items?

    About SN74LVC1G04,

    1. With Tpd of 3.1 ns, what's the max. frequency at 5V?

    2. Is there a calculation formula for max. frequency?

    About SN74AUC1G04,

    1. With Tpd of 2.2 ns and 250MHz, what's the Vcc voltage range?

        I think that is 1.5V to 2.5V.

    BR,

    Michael

  • There are three ways of determining the maximum frequency:

    1. Look at the specifications of a flip-flop in the same family.
    2. Calculate the frequency from the propagation delay, e.g., 1 / 3.1 ns/bit = 322 Mbps = 161 MHz. This is likely to underestimate the actual limit, because the logic gate might be able to accept a new value at its input even when the output has not yet finished switching.
    3. Do measurements to find out what frequencies the devices actually can handle. TI publishes these specifications only for flip-flops and some level translators.

    If you do not have 3., take the maximum derived from 1. and 2.

    The tpd depends on the supply voltage and the load capacitance. For the SN74AUC1G04, 200 MHz (400 Mbps) corresponds to 2.5 ns, which this device can do at all voltages down to 1.5 V.