Hi Team,
In our application note, Implications of Slow or Floating CMOS Inputs,
https://www.ti.com/lit/an/scba004e/scba004e.pdf
Our recommend input transition rise/fall rate is 10ns/V (maximum) for LVT/LVC.... families.
is that mean input signal can not faster or slower than 10ns/V?
Thanks & Regards
Eddie