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SN74LVC1G99-Q1: OE Bar Pulled High

Part Number: SN74LVC1G99-Q1

Hey Team,

I am looking into using the SN74LVC1G99-Q1 as a XNOR gate. It can be configured as XNOR gate when OE bar and B is low and A is high.

I saw this description in datasheet, “To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.”

So my questions are as follows:

  • Can I directly tie OE bar and B to GND and pull A to 5V?
  • Do I need additional control for OE bar to pull it low after powering up?

Best,
Dajon McGill

  • Hi Dajon,

    Can I directly tie OE bar and B to GND and pull A to 5V?

    Yes. This is one of the recommended methods for permanently setting pins to a particular value. You can either short the pin to the required value, or use a resistor to do the same thing. Since the inputs are high impedance, both methods are equivalent.

    This FAQ has some additional information regarding terminating unused channels: [FAQ] How do I terminate any unused channels of a logic device? 

    We also have a video explaining the operation of a standard CMOS input that might be helpful in a more general sense: Standard CMOS Inputs 

    Do I need additional control for OE bar to pull it low after powering up?

    I don't know -- do you need to control OE\?  What is your system requirement?

    If you need the device in the high-impedance state at startup, then yes, you would need to control the OE\ pin to turn on the output at the appropriate time.  If you do not need this feature, then the OE\ pin can be permanently tied low to keep the output active at all times.