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I would like to have below test graph for my SN74AUP2G04DRYR application.
I also would like to know the temperature variance of this graph. It is just enough to let me know the tolerance of the graph for -40'C~+85'C range like within 50mV????
We also try to measure this graph with SN74AUP2G04DRYR. But I am not sure our measurement is enough for all SN74AUP2G04DRYR from TI.
So it would be appreciate to send me some information that TI is used.
Best Regards,
Vincent Hwang
C:\Users\vhwang\Desktop
For a buffered device like the SN74AUC2G04, such a graph would not be useful because the input voltage is not allowed to stay between VIL and VIH for more than a few nanoseconds. See [FAQ] How does a slow or floating input affect a CMOS device?
It would look similar to the graph below (this example is from an LVC buffer):
The switching threshold typically will be near VCC/2, but the only guarantee you get is that it is between VIL and VIH.
