Other Parts Discussed in Thread: TXS0108E, TXU0304, TXS010
The TXS0108E has edge accelerators, which try to detect the beginning of a rising or falling edge: what is the mechanism for the ege detect, What range of thresholds are considered valid?
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The TXS0108E has edge accelerators, which try to detect the beginning of a rising or falling edge: what is the mechanism for the ege detect, What range of thresholds are considered valid?
Hi Kai,
The one-shot momentarily activates when a rising or a falling edge is detected typically during switching (per the VIH and VIL levels) at about 30% to 50% Vcc, shorting the output to VCC or ground for a high or a low. With the one-shot duration designed to be activated between 10 ns and 30 ns, the internal pull-up of the TXS device drives the line high once deactivated, and maintains its’ steady state. Faster rising / falling input edges and the load capacitance should be considered by ensuring < 70 pF to help avoid expiring the one-shot before the output reaches stead state.
Please also see “A Guide to Voltage Translation with TXS-Type Translators”, thanks.
Best Regards,
Michael.
hi Micheal:
thank you for your reply, as attachment file show, I have a few questions as bellow:
1、Why the hook produced during falling ege under normal temperature(there is no load capacitance excess)?
2、the abnormal burr in point B at low temperature, is it cause by the hook in point C? is it the accelerators more easily triggered?
3、it seem the abnormal burr in point B finally result in the SCLK Level reversal in device side at low temperature, is it the accelerators triggered?
Hi Kai,
Thanks for the provided attachment.
By "below -20deg C" could you help confirm the temp?
Could you also please confirm the total load capacitance? Do you have the schematic as well as any pull ups being used? Is the application for SPI or QSPI? How long are the traces? Do the hosts have sufficient drive strength to be able to also sink current and drive the line low? These would all impact impact your observations as the device is designed with little to no drive strength and we can help recommend a more suitable device for SPI applications, thanks.
Best Regards,
Michael.
By "below -below-20deg C" could you help confirm the temp?
below-20deg C is more prone to problems,about totally load capacitance,we didn't add extra capacitance, i think the hook in point C is more likely to be affected by 0825.Low temperature failure.pptx since the rising/falling ege too fast, when we add 33ohm resistor in slaver side, can solve this problem; totally long for output is 150mm, and the application is for SPI (freqency is 1.8Mhz) ,we try to reduce frequency to 500Khz,the hook is still,so is the TXS0108 need impedance matching design? is it need to state this in application SPC? the hook not only in SCLK but also in MOSI,
Hi Kai,
Please note that without additional capacitance added, the host pins may also have capacitance of their own and slower discharges observed at pointy D can be due to RC delay.
Also, when the one-shot is activated, the output impedance is lowered to help increase output drive to support faster data rates. Slower edges and excessive loading can trigger the one-shot to expire early for the internal pull up to drive the line high or for the driver driving low.
Minor reflections can be observed in other temperatures, however; lower temp typically means lower impedance outputs and with impedance mismatch; reflections will be observed similar to [FAQ] What happens when I connect a logic device's output to a 50 ohm transmission line? and the one-shots can amplify them similar to your observations.
Furthermore, we wouldn't typically recommend auto bidirectional devices for applications that are not auto bidirectional due to their design nature for little to no drive strength to help drivers override them for auto sensing as well as their sensitivity to external components, and would typically recommend TXU0304 for SPI, thanks.
Best Regards,
Michael.
Hi Michal
I want to know how to hook the voltage will lead to the input voltage of burr.There are certain values?This value will not be affected by temperature?
Hi Kai,
Faster edges, excessive capacitive loading, and reflections can get amplified by the one-shots as false triggers at any point once detected as a rising or a falling edge. Are you within the VIL / VOL spec? Also, lower temp would mean lower impedance and can also amplify the already existing reflections due to impedance mismatch, thanks.
Best Regards,
Michael.
Hi Micheal:
We found that the hook on point C is no only on SPI,but also be found on uart/I2S, so the impedance mismatch problem may consider while use the TXS010* and TXB010* when design phas? most hardware signal integrity tests was on host and device side, in this case, the signal integrity test on soc and device side are OK on normal temp, but the TXS0108 PIN side found abnormal hook, and the hook trigger one-shots on low temp. i think need to designed as a high-speed signal while use TXS010* and TXB010* because the faster edgs.
Hi Kai,
Yes, not specific to SPI or UART/I2S as such mismatch is applicable to any application similar to the FAQ.
However, such reflections / fast edges may be amplified with auto-bidirectional devices and would suggest the recommended fixed directional device for such fixed directional applications, thanks.
Best Regards,
Michael.
hi micheal:
Also, lower temp would mean lower impedance and can also amplify the already existing reflections due to impedance mismatch;
the hook level hace no change at different temperatures, it may more likely the one-shot easier to be triggered by mistake at low temperature
,so we would more likely to know the principle of this,
TKS!
Hi Kai,
The principle for the one-shot is as explained above and applicable to all recommended temp.
Could you double confirm adding series resistors similar to [FAQ] What happens when I connect a logic device's output to a 50 ohm transmission line? helps?
Also, can you share the actual schematics fully highlighting the TXS as well? Thanks.
Best Regards,
Michael.