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SN74AVC4T774: MISO input from SPI1 cannot be pulled low by SoC and SPI2

Ives Li
Expert 6440 points
Part Number: SN74AVC4T774

Hi team,

I'm Ives Li, FAE in SZ AA1 team.

My customer TCL is using SN74AVC4T774 in their application as showed below:

And they found that the MISO input from SPI1 cannot be pulled down by SoC and SPI2, it will affect the SPI2 to work wrongly.

They try to use CS of SPI1 to control OE of 774 to solve this problem, could you help to verify if this solution could work?

More information:

- VCCA and VCCB is 3.3V, and when they try to output a low level for SOC's MISO, it can only be pull down to 2.5V but not 0V.

- Even they didn't connect the SPI1 device, the SoC still cannot pull low MISO.

Thanks!

Ives Li

  • +1
    Guru 267110 points

    SPI devices usually use three-state MISO outputs to allow sharing, that is, their /CS input works as an output-enable (/OE) for MISO.

    So you are correct, to allow sharing the '774 output, you must disable it when the SPI1 is not active. The /CS1 signal is suitable for the '774's /OE.

    (The '774's /OE input disables all four outputs, so you have to ensure that there are pull-up or -down resistors on the other three outputs to prevent these lines from floating.)